Patents by Inventor Jiancao HOU

Jiancao HOU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250070802
    Abstract: A device may receive a downlink signal from a base station and may determine an input-output relation of polar encoding based on a vector of the downlink signal. The device may perform an interleaving operation with a matrix and the input-output relation to obtain an interleaved vector and may utilize rate matching with the interleaved vector to determine a scrambling sequence of the downlink signal. The device may utilize a reverse sequence generator with the scrambling sequence to determine a scrambling sequence initialization vector for the scrambling sequence and may perform one or more actions based on the scrambling sequence initialization vector.
    Type: Application
    Filed: November 13, 2024
    Publication date: February 27, 2025
    Inventors: Onur DIZDAR, Matthew David BROWN, Jiancao HOU, Chi-ming LEUNG, Ata SATTARZADEH HASHEMI, Yi Xien YAP
  • Patent number: 12199641
    Abstract: A device may receive a downlink signal from a base station and may construct a frozen decode matrix for decoding frozen bits from data of the downlink signal. The device may construct a linear feedback shift register (LFSR) generator matrix for a component of scrambling sequence seed bits and may multiply the frozen decode matrix and the LFSR generator matrix to generate a mapping matrix for mapping a value of a scrambling sequence initialization vector that initializes a scrambler to the frozen bits. The device may determine an inverse matrix of the mapping matrix and may multiply the inverse matrix and the frozen decode matrix to obtain a final matrix. The device may utilize the final matrix to recover, from the data of the downlink signal, the scrambling sequence seed bits used to initialize the component and may perform actions based on the scrambling sequence seed bits.
    Type: Grant
    Filed: March 30, 2023
    Date of Patent: January 14, 2025
    Assignee: VIAVI Solutions Inc.
    Inventors: Onur Dizdar, Matthew David Brown, Jiancao Hou, Chi-ming Leung, Ata Sattarzadeh Hashemi, Yi Xien Yap
  • Patent number: 12191886
    Abstract: A device may receive a downlink signal from a base station and may determine an input-output relation of polar encoding based on a vector of the downlink signal. The device may perform an interleaving operation with a matrix and the input-output relation to obtain an interleaved vector and may utilize rate matching with the interleaved vector to determine a scrambling sequence of the downlink signal. The device may utilize a reverse sequence generator with the scrambling sequence to determine a scrambling sequence initialization vector for the scrambling sequence and may perform one or more actions based on the scrambling sequence initialization vector.
    Type: Grant
    Filed: March 30, 2023
    Date of Patent: January 7, 2025
    Assignee: VIAVI Solutions Inc.
    Inventors: Onur Dizdar, Matthew David Brown, Jiancao Hou, Chi-ming Leung, Ata Sattarzadeh Hashemi, Yi Xien Yap
  • Publication number: 20240333313
    Abstract: A device may receive a downlink signal from a base station and may construct a frozen decode matrix for decoding frozen bits from data of the downlink signal. The device may construct a linear feedback shift register (LFSR) generator matrix for a component of scrambling sequence seed bits and may multiply the frozen decode matrix and the LFSR generator matrix to generate a mapping matrix for mapping a value of a scrambling sequence initialization vector that initializes a scrambler to the frozen bits. The device may determine an inverse matrix of the mapping matrix and may multiply the inverse matrix and the frozen decode matrix to obtain a final matrix. The device may utilize the final matrix to recover, from the data of the downlink signal, the scrambling sequence seed bits used to initialize the component and may perform actions based on the scrambling sequence seed bits.
    Type: Application
    Filed: March 30, 2023
    Publication date: October 3, 2024
    Inventors: Onur DIZDAR, Matthew David BROWN, Jiancao HOU, Chi-ming LEUNG, Ata SATTARZADEH HASHEMI, Yi Xien YAP
  • Publication number: 20240333311
    Abstract: A device may receive a downlink signal from a base station and may determine an input-output relation of polar encoding based on a vector of the downlink signal. The device may perform an interleaving operation with a matrix and the input-output relation to obtain an interleaved vector and may utilize rate matching with the interleaved vector to determine a scrambling sequence of the downlink signal. The device may utilize a reverse sequence generator with the scrambling sequence to determine a scrambling sequence initialization vector for the scrambling sequence and may perform one or more actions based on the scrambling sequence initialization vector.
    Type: Application
    Filed: March 30, 2023
    Publication date: October 3, 2024
    Inventors: Onur DIZDAR, Matthew David BROWN, Jiancao HOU, Chi-ming LEUNG, Ata SATTARZADEH HASHEMI, Yi Xien YAP
  • Publication number: 20240292428
    Abstract: In some implementations, a user equipment (UE) may perform a decoding of downlink control information (DCI) via a physical downlink control channel (PDCCH) based on: a detection, by the UE, of a UE-specific scrambling sequence and a radio network temporary identifier (RNTI) corresponding to the UE-specific scrambling sequence; and a skipping, by the UE, of a de-scrambling operation prior to the decoding of the DCI, wherein information regarding the UE-specific scrambling sequence and the RNTI is not previously stored by the UE. The UE may refrain from decoding a plurality of possible UE-specific scrambling sequences based on the skipping of the de-scrambling operation prior to the decoding of the DCI.
    Type: Application
    Filed: February 16, 2023
    Publication date: August 29, 2024
    Inventors: Matthew David BROWN, Onur DIZDAR, Jiancao HOU, Chi-ming LEUNG, Ata SATTARZADEH HASHEMI, Yi Xien YAP, Wei LI
  • Publication number: 20240235734
    Abstract: A device may receive a PDCCH signal, may decode encoded bits of the PDCCH signal to generate coded bits, may reencode the coded bits, and may calculate a detection error probability of each coded bit at an output of soft demodulation. The device may calculate a channel decoding error probability that cyclic redundancy check bits are still attached to the coded bits, and may calculate an error probability of channel reencoding, of each coded bit, due to error propagation of polar decoding and reencoding. The device may calculate a probability density of a BMR associated with the coded bits, and may calculate a threshold based on the detection error probability, the channel decoding error probability, the error probability of channel reencoding, and the probability density of a BMR. The device may determine that the PDCCH signal is invalid based on the BMR being greater than the threshold.
    Type: Application
    Filed: October 21, 2022
    Publication date: July 11, 2024
    Inventors: Jiancao HOU, Wei LI, Matthew David BROWN, Chi-ming LEUNG
  • Publication number: 20240137153
    Abstract: A device may receive a PDCCH signal, may decode encoded bits of the PDCCH signal to generate coded bits, may reencode the coded bits, and may calculate a detection error probability of each coded bit at an output of soft demodulation. The device may calculate a channel decoding error probability that cyclic redundancy check bits are still attached to the coded bits, and may calculate an error probability of channel reencoding, of each coded bit, due to error propagation of polar decoding and reencoding. The device may calculate a probability density of a BMR associated with the coded bits, and may calculate a threshold based on the detection error probability, the channel decoding error probability, the error probability of channel reencoding, and the probability density of a BMR. The device may determine that the PDCCH signal is invalid based on the BMR being greater than the threshold.
    Type: Application
    Filed: October 20, 2022
    Publication date: April 25, 2024
    Inventors: Jiancao HOU, Wei LI, Matthew David BROWN, Chi-ming LEUNG