Patents by Inventor Jiang-Jin You

Jiang-Jin You has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11725273
    Abstract: An electronic device and a manufacturing method thereof are provided. The electronic device includes an array substrate, which includes a substrate, a first conductive layer, a first insulating layer, a second conductive layer, and a second insulating layer. The substrate has a substrate surface. The first conductive layer is located on the substrate surface. The first insulating layer is located on the first conductive layer. The second conductive layer is located on the first insulating layer and includes a first sputtering layer, a second sputtering layer, and a third sputtering layer. The second insulating layer is located on the second conductive layer. The second sputtering layer is located between the first and third sputtering layers, and includes a first metal element. The first sputtering layer includes the first metal element and a second metal element. The third sputtering layer includes the first metal element and a third metal element.
    Type: Grant
    Filed: November 1, 2021
    Date of Patent: August 15, 2023
    Assignee: Au Optronics Corporation
    Inventors: Chun-Hao Su, Chia-Ming Chang, Chia Wen Dai, Jiang-Jin You, Tai-Tso Lin, Chun-Nan Lin
  • Publication number: 20220341032
    Abstract: An electronic device and a manufacturing method thereof are provided. The electronic device includes an array substrate, which includes a substrate, a first conductive layer, a first insulating layer, a second conductive layer, and a second insulating layer. The substrate has a substrate surface. The first conductive layer is located on the substrate surface. The first insulating layer is located on the first conductive layer. The second conductive layer is located on the first insulating layer and includes a first sputtering layer, a second sputtering layer, and a third sputtering layer. The second insulating layer is located on the second conductive layer. The second sputtering layer is located between the first and third sputtering layers, and includes a first metal element. The first sputtering layer includes the first metal element and a second metal element. The third sputtering layer includes the first metal element and a third metal element.
    Type: Application
    Filed: November 1, 2021
    Publication date: October 27, 2022
    Applicant: Au Optronics Corporation
    Inventors: Chun-Hao Su, Chia-Ming Chang, Chia Wen Dai, Jiang-Jin You, Tai-Tso Lin, Chun-Nan Lin
  • Patent number: 9905701
    Abstract: An active device structure and a method of fabricating an active device are provided. The active device structure includes a gate, an oxide channel layer, a source, a drain and a high power deposited insulation layer. The gate and the oxide channel layer are overlapped in a top and bottom manner. The oxide channel layer includes a top layer and a bottom layer having a crystalline structure different from a crystalline structure of the top layer. The source and the drain both contact the oxide channel layer, wherein a gap separating the source and the drain defines a channel area. The high power deposited insulation layer contacts the top layer of the oxide channel layer. The top layer of the oxide channel layer provides the effect of blocking light, which solves the problem of threshold voltage shift due to the light irradiation on the oxide channel layer.
    Type: Grant
    Filed: March 16, 2016
    Date of Patent: February 27, 2018
    Assignee: Au Optronics Corporation
    Inventors: Po-Liang Yeh, Chen-Chung Wu, Chun-An Chang, Jiang-Jin You, Chia-Ming Chang
  • Publication number: 20160300951
    Abstract: An active device structure and a method of fabricating an active device are provided. The active device structure includes a gate, an oxide channel layer, a source, a drain and a high power deposited insulation layer. The gate and the oxide channel layer are overlapped in a top and bottom manner. The oxide channel layer includes a top layer and a bottom layer having a crystalline structure different from a crystalline structure of the top layer. The source and the drain both contact the oxide channel layer, wherein a gap separating the source and the drain defines a channel area. The high power deposited insulation layer contacts the top layer of the oxide channel layer. The top layer of the oxide channel layer provides the effect of blocking light, which solves the problem of threshold voltage shift due to the light irradiation on the oxide channel layer.
    Type: Application
    Filed: March 16, 2016
    Publication date: October 13, 2016
    Inventors: Po-Liang Yeh, Chen-Chung Wu, Chun-An Chang, Jiang-Jin You, Chia-Ming Chang