Patents by Inventor Jianggi He

Jianggi He has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090250707
    Abstract: Disclosed are embodiments of a multi-chip assembly including optically coupled die. The multi-chip assembly may include two opposing substrates, and a number of die are mounted on each of the substrates. At least one die on one of the substrates is in optical communication with at least one opposing die on the other substrate. Other embodiments are described and claimed.
    Type: Application
    Filed: June 12, 2009
    Publication date: October 8, 2009
    Inventors: Qing A. Zhou, Daoqiang Lu, Jianggi He, Wei Shi, Xiang Yin Zeng
  • Publication number: 20080023791
    Abstract: Some embodiments of the present invention include providing high performance integrated inductors.
    Type: Application
    Filed: October 5, 2007
    Publication date: January 31, 2008
    Inventors: Sriram Muthukumar, Jianggi He, Thomas Dory
  • Patent number: 7321167
    Abstract: In an integrated circuit design, flex tape is used to provide signal ingress/egress to/from the integrated circuit design. Various architectures for the signal ingress/egress via flex tape is provided. In one embodiment, coaxial design is provided. In another embodiment, a coplanar waveguide design is provided.
    Type: Grant
    Filed: June 4, 2003
    Date of Patent: January 22, 2008
    Assignee: Intel Corporation
    Inventors: Dong Zhong, Yuan-Liang Li, Jianggi He, Jung Kang, Prashant Parmar, Hyunjun Kim, Joel Auernheimer
  • Patent number: 7294525
    Abstract: Some embodiments of the present invention include providing high performance integrated inductors.
    Type: Grant
    Filed: May 25, 2005
    Date of Patent: November 13, 2007
    Assignee: Intel Corporation
    Inventors: Sriram Muthukumar, Jianggi He, Thomas S. Dory
  • Publication number: 20060270065
    Abstract: Some embodiments of the present invention include providing high performance integrated inductors.
    Type: Application
    Filed: May 25, 2005
    Publication date: November 30, 2006
    Inventors: Sriram Muthukumar, Jianggi He, Thomas Dory
  • Patent number: 7081800
    Abstract: According to embodiments of the present invention, a balun is disposed on a package that is to receive a die. In embodiments, the balun includes a first metal trace disposed on a first base and a second metal trace disposed on a second base. In embodiments, the first metal trace is one-quarter wavelength of an operating wavelength for a radio frequency (RF) signal and the second metal trace is three-quarters wavelength of the wavelength.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: July 25, 2006
    Assignee: Intel Corporation
    Inventors: Jianggi He, Udy Shrivastava, Chee Hoo Lee
  • Publication number: 20060125574
    Abstract: Transmission line impedance matching for matching an impedance discontinuity on a transmission signal trace with one or more non-transmission traces disposed near the transmission signal trace at a region corresponding to the impedance discontinuity.
    Type: Application
    Filed: February 10, 2006
    Publication date: June 15, 2006
    Inventors: Hyunjun Kim, Joong-Ho Kim, Dong-Ho Han, Jianggi He
  • Patent number: 6903431
    Abstract: This invention relates to an apparatus and methods for reducing the impedance mismatch problem encountered by differential signaling in conductive core substrates, while maintaining adherence to the common mode noise assumption. Specifically, the conductive paths that traverse through the conductive core are separated by a nonconductive material which minimize impedance and interruption of the signal coupling.
    Type: Grant
    Filed: May 28, 2003
    Date of Patent: June 7, 2005
    Assignee: Intel Corporation
    Inventor: Jianggi He
  • Patent number: 6877998
    Abstract: A socket electrically connects an integrated circuit package and a circuit board. The socket includes a frames having a plurality of electrical connectors mounted to the frame. The plurality of electrical connectors includes at least one pair of power and ground connectors, with power connector including a first broadside portion and the ground connector including a second broadside portion. The first and second broadside portion are disposed in an adjacent, spaced-apart, and substantially parallel relationship.
    Type: Grant
    Filed: December 5, 2003
    Date of Patent: April 12, 2005
    Assignee: Intel Corporation
    Inventors: Hyunjun Kim, Jianggi He, Dong-Ho Han, Joong-Ho Kim
  • Patent number: 6870257
    Abstract: A apparatus is disclosed for use as part of the packaging of an integrated circuit. The apparatus includes one or more flex tapes coupled to the integrated circuit. These flex tapes are utilized to deliver power to the integrated circuit.
    Type: Grant
    Filed: June 4, 2003
    Date of Patent: March 22, 2005
    Assignee: Intel Corporation
    Inventors: Dong Zhong, Yuan-Liang Li, Jianggi He, Jung Kang
  • Publication number: 20040245014
    Abstract: An apparatus is disclosed for use as part of the packaging of an integrated circuit. The apparatus includes one or more flex tapes coupled to the integrated circuit. These flex tapes are utilized to deliver power to the integrated circuit.
    Type: Application
    Filed: June 4, 2003
    Publication date: December 9, 2004
    Inventors: Dong Zhong, Yuan-Liang Li, Jianggi He, Jung Kang
  • Publication number: 20040245610
    Abstract: In an integrated circuit design, flex tape is used to provide signal ingress/egress to/from the integrated circuit design. Various architectures for the signal ingress/egress via flex tape is provided. In one embodiment, coaxial design is provided. In another embodiment, a coplanar waveguide design is provided.
    Type: Application
    Filed: June 4, 2003
    Publication date: December 9, 2004
    Inventors: Dong Zhong, Yuang-Liang Li, Jianggi He, Jung Kang, Prashant Parmar, Hyunjun Kim, Joel Auernheimer
  • Publication number: 20040238938
    Abstract: This invention relates to an apparatus and methods for reducing the impedance mismatch problem encountered by differential signaling in conductive core substrates, while maintaining adherence to the common mode noise assumption. Specifically, the conductive paths that traverse through the conductive core are separated by a nonconductive material which minimize impedance and interruption of the signal coupling.
    Type: Application
    Filed: May 28, 2003
    Publication date: December 2, 2004
    Inventor: Jianggi He