Patents by Inventor Jiangin Wang

Jiangin Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6825723
    Abstract: In a gain-controlled amplifier, first, second and third transistors are provided, and a signal at one of input and output terminals is compared with a threshold voltage. When the compared signal is lower than the threshold, the second and third transistors are respectively turned into conducting and non-conducting states, and when the compared signal is higher than the threshold, the situation is in reverse. When the third transistor is non-conducting, the first and second transistors are configured to form a cascode amplifier between the input and output terminals to produce a low-noise, high-gain output signal. When the second transistor is non-conducting, the first and third transistors are configured so that the third transistor forms a base-grounded amplifier between the input and output terminals and the first transistor forms a diode for supplying a DC bias current to the third transistor to produce a low-distortion, low-gain output signal.
    Type: Grant
    Filed: May 23, 2003
    Date of Patent: November 30, 2004
    Assignee: NEC Compound Semiconductor Devices, Ltd.
    Inventors: Yoshiaki Nakamura, Jiangin Wang
  • Publication number: 20030218505
    Abstract: In a gain-controlled amplifier, first, second and third transistors are provided, and a signal at one of input and output terminals is compared with a threshold voltage. When the compared signal is lower than the threshold, the second and third transistors are respectively turned into conducting and non-conducting states, and when the compared signal is higher than the threshold, the situation is in reverse. When the third transistor is non-conducting, the first and second transistors are configured to form a cascode amplifier between the input and output terminals to produce a low-noise, high-gain output signal. When the second transistor is non-conducting, the first and third transistors are configured so that the third transistor forms a base-grounded amplifier between the input and output terminals and the first transistor forms a diode for supplying a DC bias current to the third transistor to produce a low-distortion, low-gain output signal.
    Type: Application
    Filed: May 23, 2003
    Publication date: November 27, 2003
    Applicant: NEC Compound Semiconductor Devices, Ltd
    Inventors: Yoshiaki Nakamura, Jiangin Wang