Patents by Inventor Jiangpeng Xue

Jiangpeng Xue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7977734
    Abstract: A method for fabricating a silicon-oxide-nitride-oxide-silicon (SONOS) flash memory, comprising: preparing a silicon substrate including a silicon oxide-silicon nitride-silicon oxide (ONO) layer, a first polysilicon layer and a first etch stop layer in sequence; etching the first etch stop layer along a direction of bit line; selectively etching the first polysilicon layer with the first etch stop layer as a mask, till the silicon oxide-silicon nitride-silicon oxide (ONO) layer is exposed, the etched first polysilicon layer having an inverse trapezia section along a direction of word line; filling a dielectic layer between portions of the first polysilicon layer, the dielectric layer having a trapezia section along the direction of word line. After the above steps, it becomes easy to remove the portion of the first polysilicon layer on a sidewall of the dielectric layer by vertical etching. Thus, no polysilicon residue will be formed on the sidewall of the dielectric layer.
    Type: Grant
    Filed: July 14, 2009
    Date of Patent: July 12, 2011
    Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Haitao Jiang, Xinsheng Zhong, Jiangpeng Xue, Gangning Wang
  • Patent number: 7648882
    Abstract: A method for fabricating a silicon-oxide-nitride-oxide-silicon (SONOS) flash memory includes preparing a silicon substrate including a silicon oxide-silicon nitride-silicon oxide (ONO) layer, a first polysilicon layer and a first etch stop layer in sequence; etching the first etch stop layer along a direction of bit line; selectively etching the first polysilicon layer with the first etch stop layer as a mask, till the silicon oxide-silicon nitride-silicon oxide (ONO) layer is exposed, the etched first polysilicon layer having an inverse trapezia section along a direction of word line; and filling a dielectic layer between portions of the first polysilicon layer, the dielectric layer having a trapezia section along the direction of word line. After the above steps, it becomes easier to remove the portion of the first polysilicon layer on a sidewall of the dielectric layer by vertical etching.
    Type: Grant
    Filed: August 19, 2007
    Date of Patent: January 19, 2010
    Assignee: Semiconductors Manufacturing International (Shanghai) Corporation
    Inventors: Haitao Jiang, Xinsheng Zhong, Jiangpeng Xue, Gangning Wang
  • Publication number: 20090273020
    Abstract: A method for fabricating a silicon-oxide-nitride-oxide-silicon (SONOS) flash memory, comprising: preparing a silicon substrate including a silicon oxide-silicon nitride-silicon oxide (ONO) layer, a first polysilicon layer and a first etch stop layer in sequence; etching the first etch stop layer along a direction of bit line; selectively etching the first polysilicon layer with the first etch stop layer as a mask, till the silicon oxide-silicon nitride-silicon oxide (ONO) layer is exposed, the etched first polysilicon layer having an inverse trapezia section along a direction of word line; filling a dielectic layer between portions of the first polysilicon layer, the dielectric layer having a trapezia section along the direction of word line. After the above steps, it becomes easy to remove the portion of the first polysilicon layer on a sidewall of the dielectric layer by vertical etching. Thus, no polysilicon residue will be formed on the sidewall of the dielectric layer.
    Type: Application
    Filed: July 14, 2009
    Publication date: November 5, 2009
    Applicant: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (Shanghai) CORPORATION
    Inventors: Haitao Jiang, Xinsheng Zhong, Jiangpeng Xue, Gangning Wang
  • Publication number: 20080135919
    Abstract: A method for fabricating a silicon-oxide-nitride-oxide-silicon (SONOS) flash memory, comprising: preparing a silicon substrate including a silicon oxide-silicon nitride-silicon oxide (ONO) layer, a first polysilicon layer and a first etch stop layer in sequence; etching the first etch stop layer along a direction of bit line; selectively etching the first polysilicon layer with the first etch stop layer as a mask, till the silicon oxide-silicon nitride-silicon oxide (ONO) layer is exposed, the etched first polysilicon layer having an inverse trapezia section along a direction of word line; filling a dielectic layer between portions of the first polysilicon layer, the dielectric layer having a trapezia section along the direction of word line. After the above steps, it becomes easy to remove the portion of the first polysilicon layer on a sidewall of the dielectric layer by vertical etching. Thus, no polysilicon residue will be formed on the sidewall of the dielectric layer.
    Type: Application
    Filed: August 19, 2007
    Publication date: June 12, 2008
    Applicant: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (Shanghai) CORPORATION
    Inventors: Haitao JIANG, Xinsheng Zhong, Jiangpeng Xue, Gangning Wang