Patents by Inventor Jiangwei Shi

Jiangwei Shi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240378115
    Abstract: In once example, a memory system includes a controller and a three-dimensional non-volatile memory that are coupled. The three-dimensional non-volatile memory includes a three-dimensional memory array. The three-dimensional memory array includes a plurality of word lines and a plurality of pages that are coupled. The controller is configured to: calculate received page data corresponding to a first word line in units of page data corresponding to one word line to obtain first RAID parity data, and store the first RAID parity data in a parity buffer space; and calculate received page data corresponding to an (i+1)th word line and ith RAID parity data to obtain (i+1)th RAID parity data, and store the (i+1)th RAID parity data in the parity buffer space, the (i+1)th RAID parity data overwriting the ith RAID parity data, i being a positive integer greater than or equal to 1.
    Type: Application
    Filed: July 23, 2024
    Publication date: November 14, 2024
    Inventors: Xianwu Luo, Jiangwei Shi, Youxin He
  • Publication number: 20240340069
    Abstract: An antenna switching method. When a terminal device is in an idle state, a first target parameter is determined according to signal quality parameters corresponding to downlink signals received by a first quantity of antennas in the terminal device, and some antennas with better signal quality are selected from the first quantity of antennas as first target antennas if the first target parameter is greater than or equal to a first preset threshold, to continue to receive, through the first target antennas, downlink signals from a network device. Therefore, signal quality of the downlink signals received by the first target antennas can be better, thereby improving signal quality of the downlink signals finally received by the terminal device, to improve receiving performance of the terminal device.
    Type: Application
    Filed: March 15, 2023
    Publication date: October 10, 2024
    Inventors: Li Shen, Jiangwei Shi
  • Patent number: 12079085
    Abstract: In once example, a memory system includes a controller and a three-dimensional non-volatile memory that are coupled. The three-dimensional non-volatile memory includes a three-dimensional memory array. The three-dimensional memory array includes a plurality of word lines and a plurality of pages that are coupled. The controller is configured to: calculate received page data corresponding to a first word line in units of page data corresponding to one word line to obtain first RAID parity data, and store the first RAID parity data in a parity buffer space; and calculate received page data corresponding to an (i+1)th word line and ith RAID parity data to obtain (i+1)th RAID parity data, and store the (i+1)th RAID parity data in the parity buffer space, the (i+1)th RAID parity data overwriting the ith RAID parity data, i being a positive integer greater than or equal to 1.
    Type: Grant
    Filed: December 30, 2022
    Date of Patent: September 3, 2024
    Assignee: Yangtze Memory Technologies Co., Ltd.
    Inventors: Xianwu Luo, Jiangwei Shi, Youxin He
  • Publication number: 20240168849
    Abstract: In once example, a memory system includes a controller and a three-dimensional non-volatile memory that are coupled. The three-dimensional non-volatile memory includes a three-dimensional memory array. The three-dimensional memory array includes a plurality of word lines and a plurality of pages that are coupled. The controller is configured to: calculate received page data corresponding to a first word line in units of page data corresponding to one word line to obtain first RAID parity data, and store the first RAID parity data in a parity buffer space; and calculate received page data corresponding to an (i+1)th word line and ith RAID parity data to obtain (i+1)th RAID parity data, and store the (i+1)th RAID parity data in the parity buffer space, the (i+1)th RAID parity data overwriting the ith RAID parity data, i being a positive integer greater than or equal to 1.
    Type: Application
    Filed: December 30, 2022
    Publication date: May 23, 2024
    Inventors: Xianwu Luo, Jiangwei Shi, Youxin He
  • Publication number: 20230403036
    Abstract: A terminal determines a first band of a primary card and a second band of-a secondary card; if the secondary card does not support the first band, determines a first identifier and a second identifier of a first 2R path and a third identifier and a fourth identifier of a second 2R path based on the second band, and determines a fifth identifier and a sixth identifier of a third 2R path based on the first band, where the first identifier, the third identifier, and the fifth identifier are identifiers of primary receive paths, and the second identifier, the fourth identifier, and the sixth identifier are identifiers of diversity receive paths; and determines, based on those identifiers, and a selection condition stored in the terminal, to communicate with the second base station through the secondary card by using the first 2R path or the second 2R path.
    Type: Application
    Filed: September 6, 2022
    Publication date: December 14, 2023
    Inventors: Jiangwei Shi, Yun Wang, Chiyang Xiao