Patents by Inventor Jiangwei WANG
Jiangwei WANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12154251Abstract: An image processing method includes segmenting, by a cloud server and based on a zoom ratio of a high-definition image in a high-definition image library, a low-definition image of a small zoom ratio from a terminal to obtain a plurality of image blocks. For each image block, performing, by the cloud server, retrieval and matching in the high-definition image library to obtain one or more high-definition reference images, and then performing, by the cloud server, image quality improvement using an image enhancement network that is based on the high-definition reference images to obtain a plurality of high-definition image blocks. Finally, stitching, by the cloud server, the high-definition image blocks into a super-definition image with higher resolution and higher definition, and returning, by the cloud server, the super-definition image to the terminal.Type: GrantFiled: December 14, 2020Date of Patent: November 26, 2024Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Gang Chen, Jiangwei Li, Wei Luo, Chunlin Qin, Zhen Wang, Jing Hu, Jinlei Zhang, Zheng Li
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Publication number: 20240388438Abstract: This application provides a data processing method, a computer device, and a medium. The method is applied to a terminal device including a first client. The first client has a public client key and a private client key. The first client stores encrypted data that is obtained by encrypting the private client key according to an object password. The method includes receiving the object password; decrypting the encrypted data by using the received object password to obtain the private client key; signing the encrypted data based on the private client key to obtain a signature of the encrypted data; and transmitting the public client key, the encrypted data, and the signature of the encrypted data to a cloud device of the first client, the cloud device storing the encrypted data after verifying the encrypted data based on the public client key and the signature of the encrypted data.Type: ApplicationFiled: July 29, 2024Publication date: November 21, 2024Inventors: Hu LAN, Rui GUO, Jun LIANG, Like SHU, Zongyou WANG, Shitao XU, Yang LU, Yang MO, Zimin CHEN, Bo QIN, Zuodong LIANG, Guihong HUANG, Hui ZHANG, Jiangwei LU, Yifang SHI, Hanqing LIU, Zhiyong LIAO, Qucheng LIU, Gengliang ZHU, Shihao SHE, Tao FAN, Cong GAO, Kaixuan NIE, Yangjun HUANG, Chaojie QI, Lisen LI, Jun LI, Yifang ZHANG
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Patent number: 12121519Abstract: The present invention relates to a method for treating a tumor with a KRAS mutation. In the method, a compound 2-fluoro-5-methoxy-4-[(4-(2-methyl-3-oxo-2,3-dihydro-1H-isoindole-4-oxy)-5-trifluoromethyl-pyrimidine-2-yl)amino]-N-(1-methyl-piperidine-4-yl)benzamide or a pharmaceutically acceptable salt thereof is used, which can be administered alone or in combination with a KRAS inhibitor and/or an MEK inhibitor.Type: GrantFiled: November 27, 2020Date of Patent: October 22, 2024Assignee: INXMED (NANJING) CO., LTD.Inventors: Zaiqi Wang, Jiangwei Zhang, Jun Jiang, Baoyuan Zhang
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Patent number: 12115160Abstract: The present invention relates to the combined use of: (a) the compound of formula (I) or a pharmaceutically acceptable salt thereof; and (b) PLD or a pharmaceutically acceptable salt thereof, for treating ovarian cancer.Type: GrantFiled: August 24, 2023Date of Patent: October 15, 2024Assignee: INXMED (NANJING) CO., LTD.Inventors: Jun Jiang, Shuang Xie, Jiangwei Zhang, Zaiqi Wang
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Publication number: 20240319099Abstract: A defect detection method includes: acquiring a photoluminescence detection result of a wafer to be detected; generating a defect heat map corresponding to said wafer according to the photoluminescence detection result and a preset heat map model, the preset heat map model being constructed on the basis of a photoluminescence detection result sample after electroluminescent defect marking; and determining a defect detection result of said wafer according to the defect heat map.Type: ApplicationFiled: September 30, 2022Publication date: September 26, 2024Inventors: Zhaoming HE, Hai BI, Jiangwei DUAN, Wei WANG, Wanli YANG
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Patent number: 12097200Abstract: The present invention relates to a use of BI853520 or a pharmaceutically acceptable salt thereof in preparing drugs for treating tumors in combination with chemotherapeutic drugs.Type: GrantFiled: July 5, 2023Date of Patent: September 24, 2024Assignee: INXMED (NANJING) CO., LTD.Inventors: Zaiqi Wang, Jiangwei Zhang
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Publication number: 20240307395Abstract: The present invention relates to a method for treating a tumor such as a tumor with a KRAS mutation. In the method, a compound 2-fluoro-5-methoxy-4-[(4-(2-methyl-3-oxo-2,3-dihydro-1H-isoindole-4-oxy)-5-trifluoromethyl-pyrimidine-2-yl)amino]-N-(1-methyl-piperidine-4-yl)benzamide or a pharmaceutically acceptable salt thereof is used, which can be administered alone or in combination with a KRAS inhibitor and/or an MEK inhibitor.Type: ApplicationFiled: May 24, 2024Publication date: September 19, 2024Inventors: Zaiqi Wang, Jiangwei Zhang, Jun Jiang, Baoyuan Zhang, Xuebin Liu
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Publication number: 20240311564Abstract: Embodiments of the disclosure disclose a text processing method and apparatus, and an electronic device. A specific embodiment of the method includes: obtaining text to be processed, determining target entity words in the text to be processed, thereby generating a target entity word set; determining a word explanation corresponding to the target entity word in the target entity word set based on the text to be processed, and obtaining related information corresponding to the word explanation; and pushing target information to present the text to be processed, and displaying the target entity word in the target entity word set in a preset display mode in the text to be processed, where the target information includes the target entity word set, the word explanation corresponding to the target entity word in the target entity word set, and the related information.Type: ApplicationFiled: August 16, 2022Publication date: September 19, 2024Inventors: Yuxin Jing, Kai Ma, Zijia Chen, Xiao Wang, Feng Wang, Jiangwei Liu
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Publication number: 20240281400Abstract: Provided are a communication method and system for a distributed heterogeneous acceleration platform, a device and a medium. The method includes: after starting a collaborative acceleration task, determining, by a first target heterogeneous acceleration card in a distributed heterogeneous acceleration platform, a second target heterogeneous acceleration card from the distributed heterogeneous acceleration platform by querying an information table corresponding to the collaborative acceleration task; generating, by the first target heterogeneous acceleration card, a target data packet according to a predefined data packet format, and sending the target data packet to the second target heterogeneous acceleration card via a PCIE interface; and parsing, by the second target heterogeneous acceleration card, the target data packet according to the data packet format, and executing a corresponding read operation or write operation according to a parsing result, so as to complete the collaborative acceleration task.Type: ApplicationFiled: June 1, 2022Publication date: August 22, 2024Applicant: SUZHOU METABRAIN INTELLIGENT TECHNOLOGY CO., LTD.Inventors: Hongwei KAN, Rengang LI, Yanwei WANG, Rui HAO, Jiangwei WANG, Dongdong SU, Kefeng ZHU, Le YANG
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Patent number: 12064431Abstract: The present invention relates to a method for treating a tumor with a KRAS mutation. In the method, a compound 2-fluoro-5-methoxy-4-[(4-(2-methyl-3-oxo-2,3-dihydro-1H-isoindole-4-oxy)-5-trifluoromethyl-pyrimidine-2-yl)amino]-N-(1-methyl-piperidine-4-yl)benzamide or a pharmaceutically acceptable salt thereof is used, which can be administered alone or in combination with a KRAS inhibitor and/or an MEK inhibitor.Type: GrantFiled: November 27, 2020Date of Patent: August 20, 2024Assignee: INXMED (NANJING) CO., LTD.Inventors: Zaiqi Wang, Jiangwei Zhang, Jun Jiang, Baoyuan Zhang
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Patent number: 12059421Abstract: The present invention relates to a method for treating a tumor with a KRAS mutation. In the method, a compound 2-fluoro-5-methoxy-4-[(4-(2-methyl-3-oxo-2,3-dihydro-1H-isoindole-4-oxy)-5-trifluoromethyl-pyrimidine-2-yl)amino]-N-(1-methyl-piperidine-4-yl)benzamide or a pharmaceutically acceptable salt thereof is administered in combination with a KRAS inhibitor or an MEK inhibitor.Type: GrantFiled: July 13, 2023Date of Patent: August 13, 2024Assignee: INXMED (NANJING) CO., LTD.Inventors: Zaiqi Wang, Jiangwei Zhang, Jun Jiang, Baoyuan Zhang
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Publication number: 20240261285Abstract: The present invention relates to a use of BI853520 or a pharmaceutically acceptable salt thereof in preparing drugs for treating tumors in combination with chemotherapeutic drugs.Type: ApplicationFiled: April 11, 2024Publication date: August 8, 2024Inventors: Zaiqi Wang, Jiangwei Zhang
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Patent number: 11868297Abstract: A far-end data migration device and method based on a FPGA cloud platform. The device includes a server, a switch, and a plurality of FPGA acceleration cards. The server transmits data to be accelerated to the FPGA acceleration cards by means of the switch. The FPGA acceleration cards are configured to perform a primary and/or secondary acceleration on the data, and are configured to migrate the accelerated data. The method includes: transmitting data to be accelerated to a FPGA acceleration card from a server by means of a switch; performing, by the FPGA acceleration card, a primary and/or secondary acceleration on the data to be accelerated; and migrating, by the FPGA acceleration card, the accelerated data.Type: GrantFiled: August 25, 2020Date of Patent: January 9, 2024Assignee: INSPUR SUZHOU INTELLIGENT TECHNOLOGY CO., LTD.Inventors: Jiangwei Wang, Rui Hao, Hongwei Kan
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Patent number: 11860747Abstract: A method and apparatus for performing a power stress test on an FPGA acceleration card and a computer-readable storage medium. The method includes: dividing, according to a partial reconfiguration method, a hardware resource of an FPGA acceleration card into a static region serving as a hardware logic implementation region for performing a normal function test, and a dynamic PR region including a blank mode occupying no hardware resource and a power test mode for performing a power stress test, and burning FPGA firmware having a partial reconfiguration function to a flash memory; upon receiving a request for power stress test, configuring an operation mode of the dynamic PR region to be the power test mode, loading, to the dynamic PR region, a dynamic PR configuration file burned in the flash memory; and calling a power stress test module to execute the power stress test in the dynamic PR region.Type: GrantFiled: May 27, 2021Date of Patent: January 2, 2024Assignee: INSPUR SUZHOU INTELLIGENT TECHNOLOGY CO., LTD.Inventors: Jingdong Zhang, Jiangwei Wang, Hongwei Kan, Yaming Xu
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Publication number: 20230334094Abstract: A graph data processing method includes: acquiring target graph data to be processed; compiling statistics on the target graph data according to a first preset rule, so as to divide the target graph data into a plurality of graph data blocks and determine a boundary value and weight of each of the plurality of graph data blocks; and storing the boundary value and weight of each of the plurality of graph data blocks in a corresponding memory according to a second preset rule, so as to schedule the target graph data during a graph calculation process by use of the boundary values and the weights.Type: ApplicationFiled: November 4, 2020Publication date: October 19, 2023Inventors: Yuanli WANG, Guoqiang MEI, Jiangwei WANG
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Publication number: 20230195585Abstract: A method and apparatus for performing a power stress test on an FPGA acceleration card and a computer-readable storage medium. The method includes: dividing, according to a partial reconfiguration method, a hardware resource of an FPGA acceleration card into a static region serving as a hardware logic implementation region for performing a normal function test, and a dynamic PR region including a blank mode occupying no hardware resources and a power test mode for performing a power stress test, and burning FPGA firmware having a partial reconfiguration function to a flash memory; upon receiving a request for power stress test, configuring an operation mode of the dynamic PR region to be the power consumption test mode, loading, to the dynamic PR region, a dynamic PR configuration file burned in the flash memory; and calling a power stress test module to execute the power stress test in the dynamic PR region.Type: ApplicationFiled: May 27, 2021Publication date: June 22, 2023Inventors: Jingdong ZHANG, Jiangwei WANG, Hongwei KAN, Yaming XU
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Patent number: 11657011Abstract: Disclosed is an Avalon-to-Axi4 bus conversion method, including: in case that an Avalon bus is an Avalon_st bus, receiving Avalon_st bus data, performing a logical process on the received Avalon_st bus data, and then outputting corresponding Axi4_st bus data; and in case that the Avalon bus is an Avalon_mm bus, receiving a signal transmitted by each channel of the Avalon_mm bus, framing and storing the signal in asynchronous First Input First Output (FIFO), and in case that a device corresponding to an Axi4 bus is ready, reading the signal from the asynchronous FIFO, and outputting the signal to a corresponding channel of the Axi4 bus according to a timing relationship of the Axi4 bus.Type: GrantFiled: December 9, 2020Date of Patent: May 23, 2023Assignee: INSPUR SUZHOU INTELLIGENT TECHNOLOGY CO., LTD.Inventors: Lei Guo, Jingdong Zhang, Jiangwei Wang
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Patent number: 11609165Abstract: Provided is a material performance testing system under a fixed multi-field coupling effect in a hypergravity environment, including a hoisted sealed cabin, a bearing frame, a high-temperature furnace, a mechanical test device, and a buffer device. The bearing frame and the high-temperature furnace are fixedly mounted inside the hoisted sealed cabin. The bearing frame is covered on the high-temperature furnace. The buffer device is mounted at a bottom of the high-temperature furnace. Upper and lower ends of the mechanical test device are connected in a top of the bearing frame and the bottom of the high-temperature furnace. A sample is connected and mounted at an end of the mechanical test device.Type: GrantFiled: October 9, 2019Date of Patent: March 21, 2023Assignee: ZHEJIANG UNIVERSITYInventors: Hua Wei, Jiangwei Wang, Weian Lin, Ze Zhang, Yunmin Chen
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Publication number: 20230045601Abstract: A far-end data migration device and method based on a FPGA cloud platform. The device includes a server, a switch, and a plurality of FPGA acceleration cards. The server transmits data to be accelerated to the FPGA acceleration cards by means of the switch. The FPGA acceleration cards are configured to perform a primary and/or secondary acceleration on the data, and are configured to migrate the accelerated data. The method includes: transmitting data to be accelerated to a FPGA acceleration card from a server by means of a switch; performing, by the FPGA acceleration card, a primary and/or secondary acceleration on the data to be accelerated; and migrating, by the FPGA acceleration card, the accelerated data.Type: ApplicationFiled: August 25, 2020Publication date: February 9, 2023Inventors: Jiangwei WANG, Rui HAO, Hongwei KAN
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Publication number: 20220414043Abstract: Disclosed is an Avalon-to-Axi4 bus conversion method, including: in case that an Avalon bus is an Avalon_st bus, receiving Avalon_st bus data, performing a logical process on the received Avalon_st bus data, and then outputting corresponding Axi4_st bus data; and in case that the Avalon bus is an Avalon_mm bus, receiving a signal transmitted by each channel of the Avalon_mm bus, framing and storing the signal in asynchronous First Input First Output (FIFO), and in case that a device corresponding to an Axi4 bus is ready, reading the signal from the asynchronous FIFO, and outputting the signal to a corresponding channel of the Axi4 bus according to a timing relationship of the Axi4 bus.Type: ApplicationFiled: December 9, 2020Publication date: December 29, 2022Inventors: Lei GUO, Jingdong ZHANG, Jiangwei WANG