Abstract: An acoustic device is provided, including: a diaphragm; a housing configured to accommodate the diaphragm and form a first acoustic cavity and a second acoustic cavity corresponding to a front side and a rear side of the diaphragm. The diaphragm radiates sound into the first acoustic cavity and the second acoustic cavity, and the sound in the first acoustic cavity and the sound in the second acoustic cavity are guided out through a first acoustic hole coupled to the first acoustic cavity and a second acoustic hole coupled to the second acoustic cavity; a sound absorbing structure coupled to the second acoustic cavity and is configured to absorb the sound transmitted from the second acoustic cavity to the second acoustic hole in a target frequency range, the acoustic structure including a microperforated plate and a cavity, the microperforated plate including through holes.

Abstract: Load disconnect techniques for boost converters. In an example, a power converter includes a driver circuit, a control circuit, and a comparator circuit. During normal boost operation (VIN<VOUT), the comparator circuit disables the control circuit and enables the driver circuit, which in turn fully turns on a high-side switching element during high-side on-phase. In contrast, during start-up operation or an output short-to-ground condition (VIN?VOUT), the comparator circuit disables the driver circuit and enables the control circuit, which in turn controls the gate voltage of the high-side switching element, so the current through the switching element is regulated, and the switching node voltage is regulated to about a threshold voltage higher than VIN. In this manner, the comparator circuit controls the driver circuit and the control circuit, which in turn allow the boost converter to operate in a normal fashion even when VIN is higher than VOUT.

Abstract: In some examples, an apparatus includes a filter, a voltage-to-current conversion circuit, a first current source, a second current source, a capacitor, a comparator, and a buffer. The filter has a first input voltage (VIN) input and a filter output. The voltage-to-current conversion circuit has a first input, a second VIN input, and a current output, the first input coupled to the filter output. The first current source is coupled between the current output and ground terminal. The second current source is coupled between a power terminal and the current output. The capacitor is coupled between the current output and ground terminal. The comparator has a comparator output, a comparator input, and a reference voltage (Vref) input, the comparator input coupled to the current output. The buffer has a buffer input and a buffer output, the buffer input coupled to the comparator output.

Abstract: Aspects presented herein relate to methods and devices for data or graphics processing including an apparatus, e.g., a GPU. The apparatus may obtain an indication of a plurality of workloads for graphics processing. The apparatus may also perform a binning process for a first workload of the plurality of workloads. Further, the apparatus may divide the first workload into a plurality of first sub-workloads and a second workload of the plurality of workloads into a plurality of second sub-workloads. The apparatus may also perform a rendering process for at least one first sub-workload of the plurality of first sub-workloads and a binning process for at least one second sub-workload of the plurality of second sub-workloads. The apparatus may also perform a rendering process for the at least one second sub-workload prior to a completion of the rendering process for the at least one first sub-workload.

Abstract: In described examples, a boost converter includes an inductor, a voltage input, a current regulator, an intermediate node, a transistor, and a regulation circuit. The inductor has first and second terminals. The voltage input provides an input voltage, and is coupled to the first inductor terminal. The current regulator has current regulator input and output. The current regulator input is coupled to the second inductor terminal. The current regulator allows current to flow from the current regulator input to the current regulator output, and not vice versa. The intermediate node provides a node voltage. The transistor includes a source, a drain, and a gate. The drain is coupled to the current regulator output via the intermediate node. The regulation circuit includes a first regulation input coupled to receive the input voltage, a second regulation input coupled to the intermediate node, and a regulation output coupled to the gate.

Abstract: A communication apparatus and an electronic device for implementing multi-carrier aggregation are provided. The communication apparatus includes a transceiver and an antenna array. The transceiver is coupled to a plurality of radio frequency channels, and the plurality of radio frequency channels are coupled to all antenna units in the antenna array in a one-to-one manner. Each of the plurality of radio frequency channels includes a phase shifter, and the phase shifter is configured to set a phase of a radio frequency signal transmitted in the radio frequency channel. The antenna array includes a plurality of first antenna units and a plurality of second antenna units. The plurality of first antenna units are configured to transmit a plurality of radio frequency signals of a first band, to form a first carrier signal pointing to a first direction.

Abstract: This application provides a radio frequency circuit and a communication device. In one example, a radio frequency circuit includes a frequency mixer and the phase processing circuit coupled to the frequency mixer. The phase processing circuit is configured to receive the orthogonal baseband signal, and generate the multi-phase signal based on the orthogonal baseband signal, where the multi-phase signal includes m analog signals, a phase difference between any two of the analog signals having adjacent phases is fixed, and m is a positive integer greater than or equal to 3.

Abstract: A device for decoding encoded video data is configured to determine that a chroma block of the encoded video data is coded in a cross-component prediction (CCP) mode; generate a merge candidate list for the chroma block, wherein the merge candidate list includes at least two prediction candidates generated by different CCP modes and a third prediction candidate, wherein the third prediction candidate comprises a fusion prediction candidate; receive, in the encoded video data, a syntax element set to a value; select a prediction candidate from the merge candidate list based on the value of the syntax element; determine a prediction block for the chroma block based on the selected prediction candidate; determine a decoded block of video data based on the prediction block for the chroma block; and output a decoded picture of video data that includes the decoded block of video data.

Abstract: A video decoder may be configured to receive a first instance of a flag for a first block, with a first value for the flag indicating that a cross-component prediction (CCP) mode is derived without signaling and a second value for the flag indicating that the CCP mode is signaled; in response to determining that the first instance of the flag is set to the first value, derive a first CCP mode for the first block; determine a first predicted chroma block for the first block using the first CCP mode; determine a decoded version of the first block based on the first predicted chroma block; and output a picture of decoded video data that includes the decoded version of the first block.

Abstract: A circuit includes a comparator circuit having a first input, a second input, a first output and a second output. The circuit also includes the first input configured to receive an input voltage of a power supply circuit and the second input configured to receive an output voltage of the power supply circuit. Additionally, the circuit includes the first output to provide the larger of the input voltage or the output voltage and the second output to provide a logic low signal responsive to the input voltage being less than the output voltage, and to provide a logic high signal responsive to the input voltage being greater than or equal to the output voltage.

Abstract: A French press rod assembly configured to be operably engaged with a French press coffee pot wherein the French press rod assembly provides an element to engage therewith to stabilize the French press rod assembly during removal of the filter screen. The French press rod assembly includes a shaft having a first end and a second end. A handle is secured to the first end of the shaft and a filter screen is removably secured to the second end of the shaft. The shaft has surroundably mounted thereto proximate the second end an engagement member. A flow member is rotatably secured to the shaft wherein the flow member is intermediate the second end of the shaft and the engagement member. In a preferred embodiment of the flow member, the flow member is rotatably mounted to the shaft and includes a plurality of blades.

Abstract: Aspects presented herein relate to methods and devices for graphics processing including an apparatus, e.g., GPU. The apparatus may obtain an indication of a set of primitives for a draw call operation. The apparatus may also identify a subset of primitives in the set of primitives, each of the subset of primitives including a primitive portion that is outside of a viewing frustum for the draw call operation, and the primitive portion corresponding to less than all of each of the subset of primitives. Further, the apparatus may calculate an area of each of the subset of primitives including the primitive portion that is outside of the viewing frustum. The apparatus may also perform, or refrain from performing, a clipping operation for each of the subset of primitives based on the area of each of the subset of primitives being less than or greater than an area threshold.

Abstract: One or more embodiments of the present disclosure provide an acoustic output device, comprising a housing; a first loudspeaker disposed in the housing, the first loudspeaker being acoustically coupled with a first hole portion and a second hole portion disposed on the housing, respectively, and the first loudspeaker being driven by a first electrical signal to output a first sound wave and a second sound wave having a phase difference through the first hole portion and the second hole portion, respectively; and a second loudspeaker disposed in the housing, the second loudspeaker being driven by a second electrical signal to output a third sound wave. In a target frequency range, the superposition of the first sound wave, the second sound wave, and the third sound wave generates a directional far-field radiation from the acoustic output device.

Abstract: System and method for providing content of an application programming interface (API) server to a user computer are disclosed. A webpage in the user computer includes program code to make web user interface (UI) calls to a web server. A web UI call that corresponds to a web UI specification includes an API identifier, which corresponds to an API specification. The API specification is identified from among several API specifications using the API identifier. The API specification includes a route to an API server. A parameter included in the web UI call is checked for conformance to the API specification. In response to the parameter conforming to the API specification, an API request is made to the API server. A component of the webpage is rendered using a result of the API request provided by the API server.

Abstract: An acoustic output device comprises a housing, a first loudspeaker and a second loudspeaker disposed in the housing. The first loudspeaker includes a first diaphragm. In the housing, a first front cavity and a first rear cavity are respectively disposed on a front side and a rear side of the first diaphragm, and the first front cavity and the first rear cavity are acoustically coupled with two hole portions disposed on the housing, respectively, to output a first sound wave and a second sound wave. The second loudspeaker includes a second diaphragm. In the housing, a second front cavity and a second rear cavity are respectively disposed on a front side and a rear side of the second diaphragm, and only one of the second front cavity and the second rear cavity is acoustically coupled with a hole portion disposed on the housing to output a third sound wave.

Abstract: Provided are a pixel structure, a display panel and a display device. The pixel structure includes multiple first sub-pixel groups, each of the multiple first sub-pixel groups includes a first sub-pixel and at least one second sub-pixel, the first sub-pixel is disposed around the at least one second sub-pixel and an emission color of the first sub-pixel is different from an emission color of any one of the at least one second sub-pixel.

Abstract: A circuit includes a control circuit having a first control circuit input, a second control circuit input, a first control circuit output, and a second control circuit output, and a first transistor having a first current terminal, a second current terminal, and a control terminal, the control terminal coupled to the first control circuit output, the first current terminal coupled to the first control circuit input and to a second transistor, and the second current terminal adapted to be coupled to the second transistor, a logic circuit having a first logic input, a second logic input, and a logic output, the first logic input coupled to the second control circuit output and a switch having a first switch terminal, a second switch terminal, and a switch control terminal, the switch control terminal coupled to the logic output and the first switch terminal coupled to the second current terminal.

Abstract: A video decoder determines that a current block of size width (WCB)×height (HCB) is coded in an affine prediction mode; predicts each subblock of a first plurality of subblocks using an affine motion model to determine an initial prediction block, each subblock having a size of width (WSB)×height (HSB) and WSB being less than WCB and HSB being less than HCB; applies a bi-directional optical flow process to first and second subblocks of a second plurality of subblocks to determine first and second refined prediction subblocks, each subblock having a size of width (WSBIPB)×height (HSBIPB), WSBIPB being less than or equal to WCB and less than or equal to WSB and HSBIPB being less than or equal to HCB and less than or equal to HSB; and determines a refined prediction block based on the first refined subblock and the second refined subblock.

Abstract: A method of encoding or decoding video data includes storing a block vector (BV) for a current block in a history BV list for encoding or decoding a subsequent block, wherein the current block is encoded or decoded in intra temporal motion vector prediction (IntraTMP) mode, and wherein the history BV list includes BVs for blocks that do not neighbor the subsequent block; deriving a candidate list of BVs for the subsequent block based on BVs from the history BV list that includes the BV for the current block; and encoding or decoding the subsequent block based on the candidate list of BVs.

Abstract: Methods, apparatus and systems that relate to a low-cost reconfigurable polarimetric imaging are described. One example polarization imaging system includes a lens positioned to receive light reflected from one or more objects, and a spectral-polarization filter positioned at an aperture plane of the lens to filter the light received by the lens. The polarization imaging system can further include a sensor positioned to detect the filtered light from the spectral-polarization filter to form a polarization image of the one or more objects. The spectral-polarization filter comprises a first array of multiple spectral filters and a second array of multiple polarizers.