Abstract: The present invention relates to a device and a method for transmitting a reference signal in a multi-antenna system. The present specification discloses a method for receiving a reference signal, the method comprising the steps of: receiving, from a base station, first channel state information (CSI) reference signal (CSI-RS) configuration information including individual parameters necessary when a terminal receives a first CSI-RS from a horizontally adjacent horizontal representative antenna among the all of the transmission antennas of the base station and second CSI-RS configuration information including individual parameters necessary when the terminal receives a second CSI-RS from a vertically adjacent vertical representative antenna; and receiving the respective first and second CSI-RSs from the base station on the basis of the first CSI-RS configuration information and the second CSI-RS configuration information.

Abstract: The present invention relates to an uplink power control method and apparatus and an uplink signal receiving method and apparatus using the same. According to an embodiment of the present invention, there is provided a method of receiving an uplink signal, the method of including selecting receiving points in a CoMP (Coordinated Multi-Point) system, transmitting CoMP setting information to UE, and receiving uplink transmission from the UE, wherein uplink transmission power used for the uplink transmission is controlled based on an effective path loss calculated by using at least one of path losses between the UE performing the uplink transmission and points in the CoMP system. According to the present invention, when uplink transmission power control is performed in the uplink CoMP system, path losses for a plurality of receiving points are reflected so that power control may be exactly done.

Abstract: Provided is a method and apparatus for transmitting a reference signal by a base station in a multi-cell cooperative communication environment. The method for transmitting the reference signal according to the present invention comprises the steps of: transmitting cell ID information of a second cell to a terminal which uses a first cell as a serving cell; generating reference signal sequences in the first cell and the second cell on the basis of the same cell ID; and performing resource element mapping on each of the generated reference signals, generating signals, and transmitting the signals to the terminal, wherein the same cell ID used in generating the reference signal sequences is a cell ID of the first cell or a cell ID of the second cell.

Abstract: The present invention relates to a device and a method for transmitting a reference signal in a multi-antenna system. The present specification discloses a method for receiving a reference signal, the method comprising the steps of: receiving, from a base station, first channel state information (CSI) reference signal (CSI-RS) configuration information including individual parameters necessary when a terminal receives a first CSI-RS from a horizontally adjacent horizontal representative antenna among the all of the transmission antennas of the base station and second CSI-RS configuration information including individual parameters necessary when the terminal receives a second CSI-RS from a vertically adjacent vertical representative antenna; and receiving the respective first and second CSI-RSs from the base station on the basis of the first CSI-RS configuration information and the second CSI-RS configuration information.

Abstract: A method of manufacturing an integrated circuit package includes: forming a substrate including: forming a core layer, and forming vias in the core layer; forming a conductive layer having a predetermined thickness on the core layer and having substantially twice the predetermined thickness in the vias; and forming connections between an integrated circuit die and the conductive layer.

Abstract: The present invention relates to an uplink power control method and apparatus and an uplink signal receiving method and apparatus using the same. According to an embodiment of the present invention, there is provided a method of receiving an uplink signal, the method of including selecting receiving points in a CoMP (Coordinated Multi-Point) system, transmitting CoMP setting information to UE, and receiving uplink transmission from the UE, wherein uplink transmission power used for the uplink transmission is controlled based on an effective path loss calculated by using at least one of path losses between the UE performing the uplink transmission and points in the CoMP system. According to the present invention, when uplink transmission power control is performed in the uplink CoMP system, path losses for a plurality of receiving points are reflected so that power control may be exactly done.

Abstract: Provided is a method and apparatus for transmitting a reference signal by a base station in a multi-cell cooperative communication environment. The method for transmitting the reference signal according to the present invention comprises the steps of: transmitting cell ID information of a second cell to a terminal which uses a first cell as a serving cell; generating reference signal sequences in the first cell and the second cell on the basis of the same cell ID; and performing resource element mapping on each of the generated reference signals, generating signals, and transmitting the signals to the terminal, wherein the same cell ID used in generating the reference signal sequences is a cell ID of the first cell or a cell ID of the second cell.

Abstract: A method of manufacturing an integrated circuit package includes: forming a substrate including: forming a core layer, and forming vias in the core layer; forming a conductive layer having a predetermined thickness on the core layer and having substantially twice the predetermined thickness in the vias; and forming connections between an integrated circuit die and the conductive layer.

Abstract: A method of manufacturing an integrated circuit package includes: forming a substrate that includes: forming a core layer, forming vias in the core layer, and forming a conductive layer having a predetermined thickness on the core layer and having substantially twice the predetermined thickness in the vias; and forming connections between an integrated circuit die and the conductive layer.

Abstract: A method of manufacturing an integrated circuit package includes: forming a substrate that includes: forming a core layer, forming vias in the core layer, and forming a conductive layer having a predetermined thickness on the core layer and having substantially twice the predetermined thickness in the vias; and forming connections between an integrated circuit die and the conductive layer.

Abstract: An integrated circuit package comprises a substrate including a core layer with a through opening and vias. A first conductive layer is on the core layer covering the through opening and a second conductive layer is on the core layer opposite the first conductive layer in the through opening and in the vias contacting the first conductive layer. An integrated circuit die is bonded to the second conductive layer and in the through opening. Connections are between the integrated circuit die and the second conductive layer, and the integrated circuit die and the connections are encapsulated.

Abstract: An integrated circuit package comprises a substrate including a core layer with a through opening and vias. A first conductive layer is on the core layer covering the through opening and a second conductive layer is on the core layer opposite the first conductive layer in the through opening and in the vias contacting the first conductive layer. An integrated circuit die is bonded to the second conductive layer and in the through opening. Connections are between the integrated circuit die and the second conductive layer, and the integrated circuit die and the connections are encapsulated.

Abstract: A method for manufacturing an integrated circuit package comprises forming a substrate by forming a core layer with a through opening and vias. A first conductive layer is formed on the core layer covering the through opening and a second conductive layer is formed on the core layer opposite the first conductive layer in the through opening and in the vias contacting the first conductive layer. An integrated circuit die is bonded to the second conductive layer and in the through opening. Connections are formed between the integrated circuit die and the second conductive layer, and the integrated circuit die and the connections are encapsulated.

Abstract: An integrated circuit package is provided. A substrate is provided having solder openings therein and a conductive layer thereon. The conductive layer is processed to form a plurality of pads over the solder openings in the substrate. A mask is formed over the plurality of pads and openings formed in the mask over at least two pads of the plurality of pads. An integrated circuit die is bonded over the substrate using a conductive adhesive where the conductive adhesive is placed in the openings in conductive contact with at least two pads of the plurality of pads.

Abstract: An integrated circuit package, and manufacturing method therefor, is provided. A substrate is provided having solder openings therein and a conductive layer thereon. The conductive layer is processed to form a plurality of pads over the solder openings in the substrate. A mask is formed over the plurality of pads and openings formed in the mask over at least two pads of the plurality of pads. An integrated circuit die is bonded over the substrate using a conductive adhesive where the conductive adhesive is placed in the openings in conductive contact with at least two pads of the plurality of pads.

Abstract: A new method is provided for the creation of high-accuracy and low-accuracy openings overlying points of electrical access over the surface of a semiconductor device supporting substrate. Openings are first created for access to the substrate followed by copper plating and then patterning of the plated layer of copper, creating the interconnect metal over the surface of the substrate. A first solder mask is coated over the surface of the substrate, this first solder mask must be provided with a first array of low-accuracy openings for electrical access there-through for the placement of contact balls. The first openings can be created using conventional film artwork since low accuracy is required for the contact ball openings, resulting in a low-cost process for the creation of the first openings. A second solder mask is next coated over the surface of the first solder mask.

Abstract: A new method is provided for the creation of high-accuracy and low-accuracy openings overlying points of electrical access over the surface of a semiconductor device supporting substrate. Openings are first created for access to the substrate followed by copper plating and then patterning of the plated layer of copper, creating the interconnect metal over the surface of the substrate. A first solder mask is coated over the surface of the substrate, this first solder mask must be provided with a first array of low-accuracy openings for electrical access there-through for the placement of contact balls. The first openings can be created using conventional film artwork since low accuracy is required for the contact ball openings, resulting in a low-cost process for the creation of the first openings. A second solder mask is next coated over the surface of the first solder mask.

Abstract: An integrated circuit package, and manufacturing method therefor, is provided. A substrate is provided having solder openings therein and a conductive layer thereon. The conductive layer is processed to form a plurality of pads over the solder openings in the substrate. A mask is formed over the plurality of pads and openings formed in the mask over at least two pads of the plurality of pads. An integrated circuit die is bonded over the substrate using a conductive adhesive where the conductive adhesive is placed in the openings in conductive contact with at least two pads of the plurality of pads.