Abstract: The present application discloses an array substrate and a display panel. The array substrate includes: a pixel circuit including a first capacitor, a second capacitor, a driving transistor, and at least two scan lines; the pixel circuit includes a first-type transistor and a second-type transistor; along a second direction, an orthographic projection of the first capacitor on the substrate, an orthographic projection of the second capacitor on the substrate, and an orthographic projection of the driving transistor on the substrate are located between orthographic projections on the substrate of any two scan lines respectively connected to the first-type transistor and the second-type transistor, and the first capacitor and the second capacitor are arranged along the second direction; and the second direction intersects a first direction.

Abstract: The present application discloses a pixel circuit and a driving method thereof. The pixel circuit includes: a driving module, a coupling module, a compensation module, and a voltage writing module; a first terminal of the compensation module is connected to a first terminal of the driving module, a second terminal of the compensation module is connected to a control terminal of the driving module, and the compensation module is configured to transmit a threshold voltage information of the driving module to the driving module; the coupling module is connected between the voltage writing module and the first terminal of the driving module, and is electrically configured to time-divisionally transmit a first initialization voltage and a data voltage to the coupling module; the coupling module is configured to couple a voltage containing the data voltage to the control terminal of the driving module.

Abstract: The present application discloses a display panel and a display device. The display panel includes a substrate; a first type active layer located on one side of the substrate; a second type active layer located on a side of the first type active layer away from the substrate; a first conductive layer located on a side of the first type active layer away from the substrate; a second conductive layer located on a side of the second type active layer away from the substrate; a gate signal line at least partially located in the first conductive layer and the second conductive layer, the gate signal line being used to transmit a same gate signal to the first transistor and the second transistor. The embodiment can reduce the space occupied by the pixel circuit, facilitate improving resolution, and thus facilitate optimizing the display effect.

Abstract: The present disclosure discloses a pixel circuit, an array substrate, and a display panel. In a first initialization phase, a first initialization module transmits a first initialization voltage from a first initialization signal line to a control terminal of a driving module. A first terminal of the driving module receives a predetermined fixed voltage, and a voltage value of the predetermined fixed voltage is greater than a voltage value of the first initialization voltage. This creates a voltage difference between the first terminal and the control terminal of the driving module during the first initialization phase, thereby recovering threshold voltage drift of the driving module, improving afterimage issues in displayed images, and enhancing image display quality. In a compensation phase, a compensation module transmits voltage information related to a threshold voltage of the driving module to the control terminal of the driving module.

Abstract: The present disclosure discloses a shift register and a display panel. The shift register includes a first signal output module and a second signal output module. A control terminal of the first signal output module and a first control terminal of the second signal output module are connected at a first node. The first node is configured to receive a start signal. A second control terminal of the second signal output module and an output terminal of the first signal output module are connected at a second node. The first signal output module is configured to output a first gate driving signal to the second node based on a voltage of the first node. The second signal output module is configured to output a second gate driving signal based on the voltage of the first node and a voltage of the second node.

Abstract: Disclosed are a shift register, a gate driving circuit, and a display panel. The shift register includes first and second control modules and first and second output modules. The first control module transmits a first or second power supply signal to a first node. The second control module transmits a first or third power supply signal to a second node under control of a potential of the first node, to output an inverted potential at the second node. The second output module transmits to a second output terminal, in response to a potential of the second node, a second output signal at a potential of the first power supply signal, and in response to a potential of a third node, a second output signal at a potential of a second clock signal. One shift register thereby outputs two kinds of scanning signals, is more integrated, and realizes a narrow bezel.

Abstract: The present application discloses a pixel circuit and a method for driving the same, a display panel, and a display apparatus. The pixel circuit includes a drive module, where the drive module includes a first transistor and a second transistor connected in parallel, a first terminal of the first transistor and a first terminal of the second transistor are connected to form a first end of the drive module, a second terminal of the first transistor and a second terminal of the second transistor are connected to each other as a second end of the drive module, a first gate of the first transistor and a second gate of the second transistor are connected to each other to form a control end of the drive module, and a subthreshold swing of the first transistor is greater than a subthreshold swing of the second transistor.

Abstract: The present application discloses a display panel. The display panel includes a substrate; an active layer disposed on one side of the substrate, the active layer including a plurality of channel regions, the channel regions being used to form transistors; and at least two light-shielding layers stacked on a side of the active layer away from the substrate, and an orthographic projection of at least one of the light-shielding layers on the substrate at least partially overlaps an orthographic projection of the channel region on the substrate, and orthographic projections of the at least two light-shielding layers on the substrate cover the orthographic projection of the channel region on the substrate. This can improve the threshold voltage stability of the transistors and ameliorate abnormal display and mura phenomena in the display panel.

Abstract: The pixel circuit includes: a drive sub-circuit, a first terminal of the drive sub-circuit being connected to a first power line, where in each drive cycle, a voltage of a first power signal on the first power line differs in at least two drive phases; and a threshold compensation sub-circuit, the threshold compensation sub-circuit being connected between a second terminal of the drive sub-circuit and a control terminal of the drive sub-circuit, and the threshold compensation sub-circuit being configured to reset the drive sub-circuit and perform threshold compensation on the drive sub-circuit in a time-division manner, where the first power signal includes a second reset voltage and a first power voltage.

Abstract: Embodiments of the present application disclose a shift register, and a gate drive circuit and a driving method therefor. A first control module is configured to control, based on a signal of a first clock signal terminal, a signal of a second clock signal terminal, and a level of a second node, an initial signal and a first level signal to be transmitted to a first node. A second control module controls, based on the initial signal and a signal of a third clock signal terminal, a second level signal and the signal of the third clock signal terminal to be transmitted to the second node. An output module controls, based on a level of the first node, the signal of the second clock signal terminal to be transmitted to an output terminal of the shift register.

Abstract: The embodiments of the present application disclose a display panel and a display device. The display panel includes: a substrate, a plurality of conductive layers stacked on a side of the substrate, and at least one pixel circuit including a driving transistor and a first capacitor; where the plurality of conductive layers stacked on the side of the substrate include a first conductive layer and a second conductive layer, and the second conductive layer is located on a side of the first conductive layer away from the substrate, enhancing the stability of a screen, and thus improving the display effect.

Abstract: Embodiments of the present application disclose a pixel circuit and a driving method therefor, and a display panel. The pixel circuit includes a driving module, a data writing module, a coupling module, and a light-emitting module. The data writing module is connected to a first terminal of the coupling module, and a second terminal of the coupling module is connected to a control terminal of the driving module. The embodiments of the present application can shorten a row time to implement display at a high refresh rate.

Abstract: The present application discloses a display driving circuit and a display device. The display driving circuit includes: a first scan driving circuit, including: a plurality of first shift registers arranged in cascade, and at least one first cascade control module. The first shift register includes a first register input terminal and a first register output terminal. The first cascade control module includes a first cascade control unit and a signal transfer unit, where the first cascade control unit is configured to control a connection state between a current-stage first register output terminal and a next-stage first register input terminal. An output terminal of the signal transfer unit is electrically connected to a next-stage first register input terminal; and the signal transfer unit is configured to transmit a start control signal to the next-stage first register input terminal in response to a transfer control signal.

Abstract: Provided are a display panel. A non-display region of the display panel includes at least one arc angle region and a first power bus passing through the at least one arc angle region. The first power bus includes a first bus portion and a second bus portion. The first bus portion is disposed on a side of a display region and is electrically connected to the second bus portion. The first bus portion is configured to be connected to a power supply. Multiple power signal lines are also disposed in the display region. The power signal lines are electrically connected between the second bus portion in at least one arc angle region and the first bus portion. The current in the second bus portion in the arc angle region is shunted to the display region through the power signal lines disposed in the display region.

Abstract: The present application relates to an array base plate, a display panel, and a method for manufacturing an array base plate, and the array base plate includes: a substrate; a device layer stacked on a side of the substrate along a thickness direction thereof, wherein the device layer includes a first type transistor, a second type transistor, and a capacitor, the first type transistor includes a first source-drain electrode, the second type transistor includes a second source-drain electrode, and the capacitor includes a first electrode plate and a second electrode plate; wherein the first electrode plate is provided on the same layer as at least one of the first source-drain electrode and the second source-drain electrode, and the second electrode plate is provided on a side of the first type transistor and the second type transistor away from the substrate along the thickness direction.

Abstract: The present application discloses a pixel circuit and a method for driving the same, a display panel, and a display apparatus. The pixel circuit includes a drive module, where the drive module includes a first transistor and a second transistor connected in parallel, a first terminal of the first transistor and a first terminal of the second transistor are connected to form a first end of the drive module, a second terminal of the first transistor and a second terminal of the second transistor are connected to each other as a second end of the drive module, a first gate of the first transistor and a second gate of the second transistor are connected to each other to form a control end of the drive module, and a subthreshold swing of the first transistor is greater than a subthreshold swing of the second transistor.

Abstract: A display panel and a display device. The display panel includes a first display region, a second display region, and a non-display region, where transmittance of the first display region is higher than transmittance of the second display region; at least one first display unit disposed in the first display region, at least one first gate drive circuit disposed in the non-display region and at least one first pixel circuits disposed in the non-display region, where the at least one first pixel circuit is connected to the at least one first display unit and configured to provide a drive current for the at least one first display unit, and the at least one first gate drive circuit is connected to the at least one first pixel circuit and configured to provide a drive signal for the at least one first pixel circuit.

Abstract: A display panel and a display device. The display panel includes at least two controlled modules and a signal wire connected to the at least two controlled modules. The signal wire is configured to receive a drive signal sent by a drive module and transmit the drive signal to the at least two controlled modules. The signal wire includes a first path wire section and a second path wire section. A first end of the first path wire section and a first end of the second path wire section are configured to receive the same drive signal. The first path wire section is configured to sequentially transmit the drive signal to the at least two controlled modules in a first preset sequence. The second path wire section is configured to sequentially transmit the drive signal to the at least two controlled modules in a second preset sequence.

Abstract: The present disclosure relates to the technical field of electronic materials. A low-dielectric wollastonite based low-temperature co-fired ceramic material and a preparation method therefor are provided. The formula of the ceramic material is: CaxSiO3+awt % SiO2+bwt % R2O+cwt % Bi2O3+dwt % B2O3+ewt % MO, wherein 0.9?x?1.1, 0<a?30, 1?b?5, 0<c?3, 0<d?6, 0?e?10, R2O is at least one of Li2O and K2O, and MO is one or more of ZnO, MgO, BaO, CoO, CuO, La2O3 and MnO2. The low-temperature co-fired ceramic material provided by the present disclosure satisfies the requirements of low dielectric, low loss and low-temperature sintering, and can be applied to the fields of millimeter wave LTCC devices and the like.

Abstract: A display panel and a display device. The display panel includes a first display region, a second display region, and a non-display region, where transmittance of the first display region is higher than transmittance of the second display region; at least one first display unit disposed in the first display region, at least one first gate drive circuit disposed in the non-display region and at least one first pixel circuits disposed in the non-display region, where the at least one first pixel circuit is connected to the at least one first display unit and configured to provide a drive current for the at least one first display unit, and the at least one first gate drive circuit is connected to the at least one first pixel circuit and configured to provide a drive signal for the at least one first pixel circuit.