Patents by Inventor Jianmin Feng

Jianmin Feng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240094141
    Abstract: The present disclosure provides a method for processing defect information of a product, which includes the following steps of: acquiring defect information on a current film layer and defect information on historical film layers; determining whether defect information exists at a target location of the historical film layer if defect information exists at a target location of the current film layer; if defect information exists for a corresponding location to the target location in at least one of the historical film layers, deleting the defect information detected at the target location in the current film layer; and if no defect information exists for the target location in any of the historical film layers, retaining the defect information detected at the target location in the current film layer.
    Type: Application
    Filed: April 30, 2021
    Publication date: March 21, 2024
    Inventors: Haijin WANG, Chuan WANG, Tian LAN, Jianmin WU, Yu FENG, Hong WANG, Yu WANG, Fan ZHANG, Jiawei REN, Jing XUE, Jianfeng ZENG
  • Patent number: 8962476
    Abstract: A semiconductor device has a semiconductor die and first conductive layer formed over a surface of the semiconductor die. A first insulating layer is formed over the surface of the semiconductor die. A second insulating layer is formed over the first insulating layer and first conductive layer. An opening is formed in the second insulating layer over the first conductive layer. A second conductive layer is formed in the opening over the first conductive layer and second insulating layer. The second conductive layer has a width that is less than a width of the first conductive layer along a first axis. The second conductive layer has a width that is greater than a width of the first conductive layer along a second axis perpendicular to the first axis. A third insulating layer is formed over the second conductive layer and first insulating layer.
    Type: Grant
    Filed: May 14, 2013
    Date of Patent: February 24, 2015
    Assignee: STATS ChipPAC, Ltd.
    Inventors: Yaojian Lin, Xia Feng, Jianmin Feng, Kang Chen
  • Publication number: 20130249111
    Abstract: A semiconductor device has a semiconductor die and first conductive layer formed over a surface of the semiconductor die. A first insulating layer is formed over the surface of the semiconductor die. A second insulating layer is formed over the first insulating layer and first conductive layer. An opening is formed in the second insulating layer over the first conductive layer. A second conductive layer is formed in the opening over the first conductive layer and second insulating layer. The second conductive layer has a width that is less than a width of the first conductive layer along a first axis. The second conductive layer has a width that is greater than a width of the first conductive layer along a second axis perpendicular to the first axis. A third insulating layer is formed over the second conductive layer and first insulating layer.
    Type: Application
    Filed: May 14, 2013
    Publication date: September 26, 2013
    Applicant: STATS ChipPAC, Ltd.
    Inventors: Yaojian Lin, Xia Feng, Jianmin Feng, Kang Chen