Patents by Inventor Jiann-Fu Chen

Jiann-Fu Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8076213
    Abstract: A method for fabricating a metal-insulator-metal (MIM) capacitor includes providing a substrate comprising a bottom electrode, forming a dielectric layer positioned on the bottom electrode, and forming a top electrode positioned on the dielectric layer. The dielectric layer includes a silicon nitride film, the silicon nitride film has a plurality of Si—H bonds and a plurality of N—H bonds, and a ratio of Si—H bonds to N—H bonds being equal to or smaller than 0.5.
    Type: Grant
    Filed: September 7, 2009
    Date of Patent: December 13, 2011
    Assignee: United Microelectronics Corp.
    Inventors: Lian-Hua Shih, Yi-Ching Wu, Jiann-Fu Chen, Ming-Te Chen, Chin-Jen Cheng
  • Publication number: 20090324851
    Abstract: A method for fabricating a metal-insulator-metal (MIM) capacitor includes providing a substrate comprising a bottom electrode, forming a dielectric layer positioned on the bottom electrode, and forming a top electrode positioned on the dielectric layer. The dielectric layer includes a silicon nitride film, the silicon nitride film has a plurality of Si—H bonds and a plurality of N—H bonds, and a ratio of Si—H bonds to N—H bonds being equal to or smaller than 0.5.
    Type: Application
    Filed: September 7, 2009
    Publication date: December 31, 2009
    Inventors: Lian-Hua Shih, Yi-Ching Wu, Jiann-Fu Chen, Ming-Te Chen, Chin-Jen Cheng
  • Patent number: 7606021
    Abstract: A metal-insulator-metal (MIM) capacitor that includes a silicon nitride (SiN) dielectric film is disclosed. The MIM capacitor includes a bottom electrode, a top electrode and a dielectric layer positioned between the bottom electrode and the top electrode. The dielectric layer includes a silicon nitride film that has a plurality of silicon-hydrogen bonds and a plurality of nitride-hydrogen bonds. A ratio of silicon-hydrogen bonds to nitride-hydrogen bonds is equal to or smaller than 0.5. Accordingly, the nitrogen-rich and compressive silicon nitride film can improve the breakdown voltage of the MIM capacitor.
    Type: Grant
    Filed: February 26, 2007
    Date of Patent: October 20, 2009
    Assignee: United Microelectronics Corp.
    Inventors: Lian-Hua Shih, Yi-Ching Wu, Jiann-Fu Chen, Ming-Te Chen, Chin-Jen Cheng
  • Publication number: 20080203528
    Abstract: A metal-insulator-metal (MIM) capacitor that includes a silicon nitride (SiN) dielectric film is disclosed. The MIM capacitor includes a bottom electrode, a top electrode and a dielectric layer positioned between the bottom electrode and the top electrode. The dielectric layer includes a silicon nitride film that has a plurality of silicon-hydrogen bonds and a plurality of nitride-hydrogen bonds. A ratio of silicon-hydrogen bonds to nitride-hydrogen bonds is equal to or smaller than 0.5. Accordingly, the nitrogen-rich and compressive silicon nitride film can improve the breakdown voltage of the MIM capacitor.
    Type: Application
    Filed: February 26, 2007
    Publication date: August 28, 2008
    Inventors: Lian-Hua Shih, Yi-Ching Wu, Jiann-Fu Chen, Ming-Te Chen, Chin-Jen Cheng
  • Patent number: 7273824
    Abstract: A semiconductor structure and a method of fabrication there-for are provided. The semiconductor structure comprises a substrate, a dielectric layer disposed over the substrate, a hydrophilic material layer disposed over the dielectric layer, and a hardmask layer disposed over the hydrophilic material layer. It is noted that, the edge of the semiconductor structure may be polished after the hydrophilic material layer is formed over the dielectric layer and before the hardmask layer is formed over the hydrophilic material layer.
    Type: Grant
    Filed: July 8, 2004
    Date of Patent: September 25, 2007
    Assignee: United Microelectronics Corp.
    Inventors: Yi-Ching Wu, Jiann-Fu Chen, Chih-Hsiang Shiau
  • Publication number: 20070141822
    Abstract: A multi-step anneal method is provided. First, a substrate is provided. Then, a dielectric layer comprising a damascene structure is formed over the substrate, and a barrier/seed layer is formed over the damascene structure. Next, a metal layer is formed over the barrier layer, and performing a first anneal step in-situ to anneal the substrate at a first temperature range with a first environment. Thereafter, a metal chemical mechanical polish (CMP) step is performed to remove a portion of the metal layer until a portion of the barrier layer is exposed. Then, a second anneal step is performed to anneal the substrate at a second temperature range with a second environment.
    Type: Application
    Filed: December 15, 2005
    Publication date: June 21, 2007
    Inventors: Jiann-Fu Chen, Meng-Hsiu Ho, Chun-Ting Hu, Chun-Hua Chang
  • Publication number: 20070060028
    Abstract: A CMP slurry delivery system includes a delivery pipe, a first slurry supply reservoir coupled to the delivery pipe for supplying an abrasive, a second slurry supply reservoir coupled to the delivery pipe for supplying a clean chemical, a third slurry supply reservoir coupled to the delivery pipe for supplying a corrosion inhibitor, and a fourth slurry supply reservoir for supplying an oxidizer.
    Type: Application
    Filed: October 30, 2006
    Publication date: March 15, 2007
    Inventors: Sheng-Yu Chen, Te-Sung Hung, Chi-Piao Cheng, Chung-Jung Cheng, Kaung-Wu Nieh, Po-Yuan Cheng, Jiann-Fu Chen, Chun-Ting Hu, Tzu-Yu Tseng, Tzu-Yi Hsieh, Hung-Chi Pai, Yung-Chieh Kuo
  • Publication number: 20060191871
    Abstract: A CMP slurry delivery system includes a delivery pipe, a first slurry supply reservoir coupled to the delivery pipe for supplying an abrasive, a second slurry supply reservoir coupled to the delivery pipe for supplying a clean chemical, a third slurry supply reservoir coupled to the delivery pipe for supplying a corrosion inhibitor, and a fourth slurry supply reservoir for supplying an oxidizer.
    Type: Application
    Filed: February 25, 2005
    Publication date: August 31, 2006
    Inventors: Sheng-Yu Chen, Te-Sung Hung, Chi-Piao Cheng, Chung-Jung Cheng, Kaung-Wu Nieh, Po-Yuan Cheng, Jiann-Fu Chen, Chun-Ting Hu, Tzu-Yu Tseng, Tzu-Yi Hsieh, Hung-Chi Pai, Yung-Chieh Kuo
  • Publication number: 20060006545
    Abstract: A semiconductor structure and a method of fabrication there-for are provided. The semiconductor structure comprises a substrate, a dielectric layer disposed over the substrate, a hydrophilic material layer disposed over the dielectric layer, and a hardmask layer disposed over the hydrophilic material layer. It is noted that, the edge of the semiconductor structure may be polished after the hydrophilic material layer is formed over the dielectric layer and before the hardmask layer is formed over the hydrophilic material layer.
    Type: Application
    Filed: July 8, 2004
    Publication date: January 12, 2006
    Inventors: Yi-Ching Wu, Jiann-Fu Chen, Chih-Hsiang Shiau