Patents by Inventor Jiann-Long Sung

Jiann-Long Sung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6617204
    Abstract: A method of forming a protective film to prevent a nitride read only memory is disclosed. In the method of the present invention, the protective layers are formed in the inter-level dielectrics (ILD)/inter-metal dielectrics (IMD) layer of the nitride read only memory cell, and the protective layers can prevent the nitride read only memory cell from being penetrated by the ultra-violet light or plasma, and avoid increasing the ion mobility to cause the charge gain during the process that affects the stability of the electricity of the nitride read only memory cell. Additionally, the threshold voltage of the nitride read only memory cell can decrease to expand the range of the threshold voltage.
    Type: Grant
    Filed: August 13, 2001
    Date of Patent: September 9, 2003
    Assignee: Macronix International Co., Ltd.
    Inventors: Jiann-Long Sung, Chen-Chin Liu, Li-Yeh Chou
  • Publication number: 20030040152
    Abstract: The present invention provides a method of fabricating an NROM cell and preventing charging. An oxide-nitride-oxide (ONO) layer and bit line masks are formed on the ONO layer of the memory array area and an implantation process forms buried bit lines within the substrate. Rows of word lines can then be formed on the ONO layer approximately perpendicular to the buried bit lines. Finally, a spacer is formed on sidewalls of each word line, and a barrier layer and a passivation layer used for preventing the NROM cell being charged during process is respectively formed on the surface of the substrate.
    Type: Application
    Filed: August 22, 2001
    Publication date: February 27, 2003
    Inventors: Chen-Chin Liu, Jiann-Long Sung
  • Publication number: 20030032224
    Abstract: A method of forming a protective film to prevent a nitride read only memory (NROM) is disclosed. In the method of the present invention, the protective layers are formed in the inter-level dielectrics (ILD)/inter-metal dielectrics (IMD) layer of the NROM cell, and the protective layers can prevent the NROM cell from being penetrated by the ultra-violet light or plasma, and avoid increasing the ion mobility to cause the charge gain during the process that affects the stability of the electricity of the NROM cell. Additionally, the threshold voltage of the NROM cell can decrease to expand the range of the threshold voltage.
    Type: Application
    Filed: August 13, 2001
    Publication date: February 13, 2003
    Applicant: MACRONIX INTERNATIONAL CO., LTD
    Inventors: Jiann-Long Sung, Chen-Chin Liu, Li-Yeh Chou
  • Patent number: 6468864
    Abstract: A method of fabricating silicon nitride read only memory. A trapping layer is formed on a substrate. Next, a patterned photoresist layer is formed, and the substrate region at the lower section of the trapping layer masked by the photoresist layer is defined as a channel region. The substrate region at the lower section of the trapping layer and no masked by the photoresist layer is defined as a source/drain region. Next, a pocket ion implantation is performed while using the photoresist layer as amask, and a first dopant is implanted into the source/drain region of the substrate. The photoresist layer is used as a mask and the source/drain ions are implanted. A second dopant is implanted into the source/drain region of the substrate. After that, the photoresist layer is removed.
    Type: Grant
    Filed: August 10, 2001
    Date of Patent: October 22, 2002
    Assignee: Macronix International Co., Ltd.
    Inventors: Jiann-Long Sung, Chen-Chin Liu, Chia-Hsing Chen
  • Patent number: 6458661
    Abstract: A method of forming a nitride read only memory (NROM) is disclosed. On the present invention's method of forming the NROM, firstly one or a plurality of isolated layers are formed to cover the oxide/nitride/oxide (ONO) structure and the gate, and the silicon nitride (SiNx) spacer is formed to protect the NROM cell. If the silicon nitride spacer contacts with the gate directly, the threshold voltage of the NROM device will increase, therefore the present invention uses one or a plurality of the isolated layers composed of the silicon oxides (SiOy) to isolate the NROM device and the silicon nitride spacer. It not only can protect the NROM device, but also can avoid side effects resulting from the use of the silicon nitride spacer and inducing the leakage current between the devices.
    Type: Grant
    Filed: June 18, 2001
    Date of Patent: October 1, 2002
    Assignee: Macronix International Co., Ltd.
    Inventor: Jiann-Long Sung