Patents by Inventor Jiannong Su

Jiannong Su has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7442637
    Abstract: A method for processing IC designs for different metal BEOL processes is provided for enabling fabricating using a metal fabrication process an IC originally having a backend design for a different metal fabrication process. The method first determines layer constructions of an original design of an IC for a first metal backend process, and, based on the layer constructions of the original design of the IC, constructs primitive layer constructions of a target design of the IC for a second metal backend process. The method then tunes an effective dielectric constant of a dielectric layer of the target design to match an associated capacitance of the target backend design with a corresponding capacitance of the original backend design. The method can be used to convert a backend design of an IC from an old metal process (such as Al process) to a new metal process (such as Cu process), without redesigning the IC for the new metal BEOL fabrication process.
    Type: Grant
    Filed: August 15, 2005
    Date of Patent: October 28, 2008
    Assignee: Chartered Semiconductor Manufacturing, Ltd
    Inventors: Jiannong Su, Simon Shi-ning Yang, Jian Zhang
  • Patent number: 7381646
    Abstract: A semiconductor fabrication method or process is provided for fabricating an integrated circuit (IC) originally having an Al backend design using a Cu BEOL fabrication process. The method converts the Al backend design to a Cu backend design without redesigning the IC for Cu BEOL fabrication process, and uses the resultant Cu design to fabricate the IC using Cu BEOL fabrication process. The Al-Cu conversion first determines layer construction of the Al design, and then matches metal resistances of the Al design with metal resistances of a Cu design, matches intra-metal capacitances of the Al design with intra-metal capacitances of the Cu design, and matches inter-metal capacitance of the Al design with inter-metal capacitances of the Cu design.
    Type: Grant
    Filed: August 15, 2005
    Date of Patent: June 3, 2008
    Assignee: Chartered Semiconductor Manufacturing, Ltd.
    Inventors: Jiannong Su, Simon Shi-ning Yang, Jian Zhang
  • Publication number: 20070037394
    Abstract: A semiconductor fabrication method or process is provided for fabricating an integrated circuit (IC) originally having an Al backend design using a Cu BEOL fabrication process. The method converts the Al backend design to a Cu backend design without redesigning the IC for Cu BEOL fabrication process, and uses the resultant Cu design to fabricate the IC using Cu BEOL fabrication process. The Al-Cu conversion first determines layer construction of the Al design, and then matches metal resistances of the Al design with metal resistances of a Cu design, matches intra-metal capacitances of the Al design with intra-metal capacitances of the Cu design, and matches inter-metal capacitance of the Al design with inter-metal capacitances of the Cu design.
    Type: Application
    Filed: August 15, 2005
    Publication date: February 15, 2007
    Applicant: CIWEST SEMICONDUCTOR CORPORATION
    Inventors: Jiannong Su, Simon Yang, Jian Zhang
  • Publication number: 20070037384
    Abstract: A method for processing IC designs for different metal BEOL processes is provided for enabling fabricating using a metal fabrication process an IC originally having a backend design for a different metal fabrication process. The method first determines layer constructions of an original design of an IC for a first metal backend process, and, based on the layer constructions of the original design of the IC, constructs primitive layer constructions of a target design of the IC for a second metal backend process. The method then tunes an effective dielectric constant of a dielectric layer of the target design to match an associated capacitance of the target backend design with a corresponding capacitance of the original backend design. The method can be used to convert a backend design of an IC from an old metal process (such as Al process) to a new metal process (such as Cu process), without redesigning the IC for the new metal BEOL fabrication process.
    Type: Application
    Filed: August 15, 2005
    Publication date: February 15, 2007
    Applicant: CIWEST SEMICONDUCTOR CORPORATION
    Inventors: Jiannong Su, Simon Yang, Jian Zhang