Abstract: A shift register includes a shift module configured for causing the cascade signal output end to output a cascade signal in response to a signal of the input signal end; an reverse output module configured for causing the reverse signal output end to output a signal reverse to the cascade signal output end in response to a signal of the cascade signal output end; a latch module configured for causing an output end of the latch module to output a control signal of the masking signal end in response to signals of the cascade signal output end and the reverse signal output end of a previous level; and a selection output module configured for providing a signal of the first power supply end or the second power supply end to the driving signal output end in response to a signal of the output end of the latch module.

Abstract: A driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit and an output circuit; the driving signal generation circuit generates and outputs the Nth stage of driving signal; the gating circuit controls to write the gating input signal into the first node; the output control circuit performs a NAND operation on the Nth stage of driving signal and the potential of the second terminal of the output control circuit to obtain a first output signal; the output circuit inverts the first output signal to obtain and provide an output driving signal through the output driving terminal; N is a positive integer.

Abstract: A display substrate and a mask plate assembly includes a base substrate, a pixel defining layer, a functional layer, a cathode layer, and a covering layer that are sequentially stacked in a direction away from the base substrate, wherein the size of orthographic projection of the functional layer on the base substrate is jointly determined by the size of a display area and a first minimum distance. The first minimum distance is the minimum distance in a direction from the display area to a non-display area and between the boundary of the display area and the boundary of the functional layer, and is determined by a first shadow width of the functional layer extending from the display area to the non-display area. The first shadow width is the maximum width of a shadow area formed within a preset region when the functional layer is vapor deposited in the preset region.

Abstract: A driving circuit, a driving method, a driving module and a display device are provided. The driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit, an output circuit, a voltage control circuit and a third control node control circuit. The third control node control circuit is electrically connected to the first node and the third control node respectively, and is configured to control the potential of the third control node according to the potential of the first node.

Abstract: A driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit, an output circuit, a voltage control circuit and a second node control circuit; the driving signal generation circuit generates an Nth stage of driving signal; the output control circuit controls to connect the first control node and the second node under the control of the potential of the first node; the gating circuit writes a gating input signal into the first node under the control of a gating control signal; the voltage control circuit controls a potential of the second node according to the potential of the first node; the second node control circuit controls to connect the second node and the first voltage terminal under the control of the potential of the first node.

Abstract: A driving circuit includes a first driving signal generation circuit, a first output control circuit, a first gating circuit, a first first energy storage circuit, a first second energy storage circuit and a first output circuit; N is a positive integer; the first gating circuit controls to write the gating input signal into the first first node under the control of the gating control signal; the first output circuit controls to connect the Nth stage of output driving terminal and the first voltage terminal under the control of the potential of the first second node, and controls to connect the Nth stage of output driving terminal and the second voltage terminal under the control of the potential of the first third control node; the first third control node and the first second control node are different nodes.

Abstract: A pixel array includes a plurality of sub-pixels, which include first to third sub-pixels. The first and third sub-pixels are alternately arranged along a row direction and form first pixel rows. The first and third sub-pixels, which are in a same column, in the first pixel rows are alternately arranged, and the second sub-pixels are arranged side by side along the row direction and form second pixel rows. Lines sequentially connecting centers of two of the first sub-pixels and two of the third sub-pixels, which are arranged in an array, together form a first virtual quadrilateral, and one of the second sub-pixels is in each first virtual quadrilateral. A straight line in the row direction or in a column direction, which passes through a center of each sub-pixel of at least one of the plurality of sub-pixels, divides the sub-pixel into two parts having areas different from each other.

Abstract: A driving circuit, a driving method, a driving module and a display device are provided. The driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit, an output circuit, a voltage control circuit and a third control node control circuit. The third control node control circuit is electrically connected to the first node and the third control node respectively, and is configured to control the potential of the third control node according to the potential of the first node.

Abstract: A display substrate and a display device are provided. The display substrate includes a base substrate and a plurality of pixel circuits, the plurality of pixel circuits are arranged on the base substrate in an array, the plurality of pixel circuits include a plurality of active patterns, each of the plurality of active patterns extends along a first direction, the plurality of active patterns are arranged along a second direction, adjacent active patterns are spaced apart from each other in the second direction, and at least one of the plurality of active patterns comprises at least one disconnection position to form a plurality of active sub-patterns independent of each other.

Abstract: The present disclosure provides a driving circuitry, a driving method, a driving module, and a display device. The driving circuitry includes a driving signal generation circuitry, a gating circuitry, an output control circuitry and an output circuitry. The driving signal generation circuitry is configured to perform a shifting operation on an (N?1)th-level driving signal to obtain an Nth-level driving signal. The gating circuitry is configured to write a gating input signal into a first node under the control of a gating control signal. The output control circuitry is configured to perform an NAND operation on the Nth-level driving signal and a potential at a second end of the output control circuitry to obtain a first output signal. The output circuitry is configured to perform phase inversion on the first output signal to obtain and provide an output driving signal through an output driving end, where N is a positive integer.

Abstract: A display panel, having a display area and a peripheral area outside the display area, includes: a driving backplane, comprising a substrate and a transistor layer, a first conductive layer, a first planarization layer and a second conductive layer sequentially provided in a direction away from the substrate; and a light-emitting device, provided on a side of the second conductive layer away from the substrate and located in the display area; wherein the light-emitting device comprises a first electrode, a light-emitting layer and a second electrode stacked in sequence in the direction away from the substrate; the first electrode is connected to at least one of the transistors through the second conductive layer, and the second electrode is connected to the second conductive line.

Abstract: A driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit, an output circuit, a voltage control circuit and a second node control circuit; the driving signal generation circuit generates an Nth stage of driving signal; the output control circuit controls to connect the first control node and the second node under the control of the potential of the first node; the gating circuit writes a gating input signal into the first node under the control of a gating control signal; the voltage control circuit controls a potential of the second node according to the potential of the first node; the second node control circuit controls to connect the second node and the first voltage terminal under the control of the potential of the first node.

Abstract: A shift register includes a shift module configured for causing the cascade signal output end to output a cascade signal in response to a signal of the input signal end; an reverse output module configured for causing the reverse signal output end to output a signal reverse to the cascade signal output end in response to a signal of the cascade signal output end; a latch module configured for causing an output end of the latch module to output a control signal of the masking signal end in response to signals of the cascade signal output end and the reverse signal output end of a previous level; and a selection output module configured for providing a signal of the first power supply end or the second power supply end to the driving signal output end in response to a signal of the output end of the latch module.

Abstract: Display substrate, method for manufacturing the same, and display device are disclosed. The display substrate comprises: a base substrate comprising a display region and a peripheral region located at a periphery of the display region, the display region comprises at least two display sub-regions; the display substrate further comprises scanning lines and sub-pixels, wherein the scanning lines comprise first scanning lines comprising at least two scanning line segments independent from each other, and the at least two scanning line segments are located in different display sub-regions; and the sub-pixels are divided into rows of sub-pixels, the rows of sub-pixels comprise a target row of sub-pixels which is divided into at least two sub-pixel groups located in different display sub-regions, and the scanning line segment is coupled to each sub-pixel in a corresponding sub-pixel group belonging to a same display sub-region.

Abstract: A drive control circuit includes an input circuit, a first output circuit and a first output control circuit. An input circuit is configured to control the potentials of a first node and a second node under the control of a signal input terminal and a clock signal terminal. The first output circuit is configured to provide a first power supply signal to a third node under the control of a first node or to provide a second power supply signal to a first output terminal under the control of a second node. The first output control circuit is configured to turn on or turn off the third node and the first output terminal under the control of the first control terminal.

Abstract: A driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit and an output circuit; the driving signal generation circuit generates and outputs the Nth stage of driving signal; the gating circuit controls to write the gating input signal into the first node; the output control circuit performs a NAND operation on the Nth stage of driving signal and the potential of the second terminal of the output control circuit to obtain a first output signal; the output circuit inverts the first output signal to obtain and provide an output driving signal through the output driving terminal; N is a positive integer.

Abstract: A driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit, an output circuit and a voltage control circuit; the driving signal generation circuit generates an Nth stage of driving signal, the output control circuit connects the first control node and the second node under the control of the potential of the first node; the gating circuit controls to write a gating input signal into the first node under the control of a gating control signal; the voltage control circuit controls a potential of the second node according to a potential of the first node; the output circuit connects the output driving terminal and the first voltage terminal under the control of the potential of the second node, and connects the output driving terminal and the second voltage terminal under the control of the potential of the third control node.

Abstract: The present disclosure provides a driving circuitry, a driving method, a driving module, and a display device. The driving circuitry includes a driving signal generation circuitry, a gating circuitry, an output control circuitry and an output circuitry. The driving signal generation circuitry is configured to perform a shifting operation on an (N?1)th-level driving signal to obtain an Nth-level driving signal. The gating circuitry is configured to write a gating input signal into a first node under the control of a gating control signal. The output control circuitry is configured to perform an NAND operation on the Nth-level driving signal and a potential at a second end of the output control circuitry to obtain a first output signal. The output circuitry is configured to perform phase inversion on the first output signal to obtain and provide an output driving signal through an output driving end, where N is a positive integer.

Abstract: A driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit, a voltage control circuit and an output circuit; the driving signal generation circuit generates the Nth stage of driving signal; the gating circuit writes a gating input signal into the first node under the control of a gating control signal; the output control circuit connects the first control node and the second node under the control of a potential of the first node; the voltage control circuit controls a potential of the second node according to the potential of the first node; the output circuit connects the output driving terminal and the first voltage terminal under the control of the potential of the second node, and connects the output driving terminal and the second voltage terminal under the control of the potential of the second control node; N is a positive integer.

Abstract: A display substrate and a display device are provided. The display substrate includes a plurality of repeat units. Each of the plurality of repeat units includes one first-color sub-pixel, one second-color sub-pixel pair and one third-color sub-pixel which are arranged in a first direction, the second-color sub-pixel pair includes two second-color sub-pixels arranging in a second direction. Connecting lines of centers of orthographic projections of light-emitting regions of four second-color sub-pixels on the base substrate form a first trapezoid, and at least one edge of the first trapezoid is located outside orthographic projections of light-emitting regions of respective sub-pixels on the base substrate.