Abstract: A method and device for image sensing. The method includes forming a first well and a second well in a substrate, forming a gate oxide layer on the substrate, and depositing a first gate region and a second gate region on the gate oxide layer. The first gate region is associated with the first well, and the second gate region is associated with the second well. Additionally, the method includes forming a third well in the substrate, implanting a first plurality of ions to form a first lightly doped source region and a first lightly doped drain region in the first well, implanting a second plurality of ions to form at least a second lightly doped drain region in the second well, and implanting a third plurality of ions to form a source in the second well.

Abstract: A complementary metal oxide semiconductor (CMOS) image sensing device includes a semiconductor substrate; a photodiode defined on the substrate; a gate dielectric layer provided over the photodiode and the substrate; a polysilicon interconnect contacting a given area of the photodiode via an opening in the gate dielectric layer; a reset transistor coupled to the photodiode; a source follower transistor coupled to the photodiode; and a select transistor coupled to the source follower transistor. The given area of the photodiode defines a node that is coupled to the reset transistor and source follower transistor.

Abstract: A method and device for image sensing. The method includes forming a first well and a second well in a substrate, forming a gate oxide layer on the substrate, and depositing a first gate region and a second gate region on the gate oxide layer. The first gate region is associated with the first well, and the second gate region is associated with the second well. Additionally, the method includes forming a third well in the substrate, implanting a first plurality of ions to form a first lightly doped source region and a first lightly doped drain region in the first well, implanting a second plurality of ions to form at least a second lightly doped drain region in the second well, and implanting a third plurality of ions to form a source in the second well.

Abstract: Techniques for manufacturing a CMOS image sensor are provided. A semiconductor substrate is provided, and at least one isolation region can be formed between a periphery region of the substrate and a photo-sensing region of the substrate. A first well in the periphery region and a second well in the photo-sensing region of the substrate are formed. A third well associated with a photodiode is also formed. A gate oxide layer, polysilicon layer, and first metal layer are respectively deposited. The polysilicon layer and first metal layer are etched to form an least one gate in the photo-sensing region and at least one gate in the periphery region. At least two doped regions in the first well are formed, as well as a doped region in the second well. A silicide block layer is deposited over the photo-sensing region of the substrate. A second metal layer is deposited at least over the periphery region after deposition of the silicide block. The substrate is exposed to a thermal environment to form silicide.

Abstract: One embodiment of the present invention provides a system for facilitating use of a collation element that supports a large number of characters. The system operates by receiving the collation element and reading a primary weight value from a primary weight field within the collation element. If the primary weight value falls within a reserved set of values, the system reads an additional portion of the primary weight value from both a secondary weight field and a tertiary weight field within the collation element. On the other hand, if the primary weight value is not within the reserved set of values, the system reads a secondary weight value from the secondary weight field, and also reads a tertiary weight value from the tertiary weight field.

Abstract: A method for a guaranteeing a network manager discovers SNMP agents on a communications network. Each SNMP agent transmits a trap to the network manager. The trap contains the network manager's IP address and the SNMP agent's identifying information, including its IP address. When the trap is received at the network manager, it is parsed for the agent identifying information, which is compared against a list of previously identified/discovered agents. If the agent identifying information is not found, i.e., if the agent is a newly discovered agent, the network manager adds the agent to the list of discovered agents. The agent is then registered/stored in the discovered agents file. When the trap does not include sufficient identifying information, the network manager sends a query to the agent to extract additional identifying information. The system manager is thus able to discover all connected agents without broadcasting a query message.

Abstract: An arrangement of spacer posts in a flat panel display. The spacer posts maintain a fixed separation between a back plate and a face plate. The back plate includes one or more electron emission sources. Phosphors or other electro-optic material are distributed among a plurality of pixel areas on the face plate. The pixel areas are arranged in distinct groups, where each group contains N adjacent pixel areas. Each pixel area includes an area free of phosphor material. Within each group of N pixel areas, the respective phosphor-free areas of the N pixel areas are contiguous so as to form a combined phosphor-free area equal to or greater than the transverse cross-section of one end of a spacer. Consequently, a spacer can be attached to the face plate at each combined phosphor-free area without disrupting the uniformity of the distribution of phosphors on the face plate.

Abstract: One embodiment of the present invention provides a system for facilitating use of a collation element that supports a large number of characters. The system operates by receiving the collation element and reading a primary weight value from a primary weight field within the collation element. If the primary weight value falls within a reserved set of values, the system reads an additional portion of the primary weight value from both a secondary weight field and a tertiary weight field within the collation element. On the other hand, if the primary weight value is not within the reserved set of values, the system reads a secondary weight value from the secondary weight field, and also reads a tertiary weight value from the tertiary weight field.

Abstract: Nanocrystalline phosphors are formed within a bicontinuous cubic phase.

Abstract: Nanocrystalline semiconductors are synthesized within a bicontinuous cubic atrix 10. The nanocrystalline particles 12 may then be end-capped 18 with a dispersant to prevent agglomeration. One typical nanocrystalline semiconductor compound made according to the present invention is PbS. Other IV-VI semiconductors may be produced by the method of the present invention. The method of this invention may also be used to produce doped semiconductors.

Abstract: Nanocrystalline phosphors are formed within a bicontinuous cubic phase. The phosphors are doped with an optimum concentration, of manganese, for example, corresponding to about one or less dopant ions per phosphor particle.

Abstract: Phosphors having a doped core are surrounded by a shell material. Additionally, these nanocrystalline phosphors, or larger phosphors formed by conventional or other processes may be surrounded by a shell that prevents or significantly reduces non-radiative recombination at the surface of the original phosphor.