Abstract: A down converter has two down converter circuits. The one down converter circuit has a first mixer, a first ½ frequency-divider, and a first PLL. The other down converter circuit has a second mixer, a second ½ frequency-divider, and a second PLL. A difference frequency between a frequency of a local oscillation frequency signal of the second PLL and a frequency of a frequency-divided signal of the first ½ frequency-divider is higher than an upper limit of a receive frequency band of a tuner.

Abstract: A down converter has two down converter circuits. The one down converter circuit has a first mixer, a first ½ frequency-divider, and a first PLL. The other down converter circuit has a second mixer, a second ½ frequency-divider, and a second PLL. A difference frequency between a frequency of a local oscillation frequency signal of the second PLL and a frequency of a frequency-divided signal of the first ½ frequency-divider is higher than an upper limit of a receive frequency band of a tuner.

Abstract: A differential logic circuit includes: a differential logic unit which receives a plurality of logic signals, performs a logic operation, and outputs a result of the logic operation from a pair of differential signal output terminals thereof; and a current source circuit which supplies current to the differential logic unit and which controls a magnitude of the current. The differential logic circuit further includes: a load circuit connected to the differential signal output terminals; and a load control circuit which is connected to the load circuit and controls a load of the load circuit such that a direct-current output voltage of the pair of differential signal output terminals is constant.

Abstract: A differential logic circuit including a current source circuit which is connected to a current control terminal and generates a current, the current value is controlled by a signal received from the current control terminal, a differential unit which, based on the current from the current source circuit, inputs a plurality of logic signals, performs a logic operation, and outputs a result of the logic operation from a pair of differential signal output terminals thereof, a load circuit which is connected to the pair of differential signal output terminals, and a load control circuit which monitors a change of the current value and controls a load of the load circuit based on a result of the monitoring.

Abstract: A differential logic circuit includes: a differential logic unit which receives a plurality of logic signals, performs a logic operation, and outputs a result of the logic operation from a pair of differential signal output terminals thereof; and a current source circuit which supplies current to the differential logic unit and which controls a magnitude of the current. The differential logic circuit further includes: a load circuit connected to the differential signal output terminals; and a load control circuit which is connected to the load circuit and controls a load of the load circuit such that a direct-current output voltage of the pair of differential signal output terminals is constant.

Abstract: An oscillator combined circuit comprises: an oscillator including a resonance circuit that includes an inductor and capacitors, and a frequency divider that includes a differential pair that receives an oscillation output signal of the oscillator, and forms current paths from a power supply side, with first ends thereof on a side opposite to the first power supply being connected to the center tap of the inductor of the oscillator. The oscillator and the frequency divider are cascode-connected between ground and the power supply and a DC power supply current flowing from a DC supply current terminal of the frequency divider to a ground side is reused as a power supply current of the oscillator.

Abstract: The high-frequency IC according to an embodiment of the invention includes a mixer down-converting the RF signal into an IF signal with a given center frequency lower than that of the RF signal, a first-order low-pass filter with a pass band set narrower than a bandwidth of the IF signal down-converted by the mixer, and an active low-pass filter removing a signal outside the bandwidth of the IF signal.

Abstract: A first RF receiving path and a second RF receiving path are activated selectively. An interstage filter is connected with the first RF receiving path and the second RF receiving path, and passes a prescribed frequency band of an RF signal output from an active RF receiving path. A frequency converter unit converts a signal output from the interstage filter into an IF signal. A bandwidth of the interstage filter corresponds to a center frequency of an RF signal to be received by the first RF receiving path. The second RF receiving path includes a center frequency shift unit that shifts a center frequency of a received RF signal so that it is included in a frequency band to pass through the interstage filter.

Abstract: An interface circuit includes a first and a second input terminal, a first output transistor, a second output transistor, a first output controller for implementing control according to a voltage supplied to the first and the second input terminal so that a predetermined current appears at a control terminal of the first output transistor if the first output transistor is in saturated state and supplies a predetermined current to the control terminal of the first output transistor if the first output transistor is in shutoff state, and a second output controller for implementing control according to a voltage supplied to the first and the second input terminal so that a predetermined current appears at a control terminal of the second output transistor if the second output transistor is in saturated state and supplies a predetermined current to the control terminal of the second output transistor if the second output transistor is in shutoff state.

Abstract: The high-frequency IC according to an embodiment of the invention includes a mixer down-converting the RF signal into an IF signal with a given center frequency lower than that of the RF signal, a first-order low-pass filter with a pass band set narrower than a bandwidth of the IF signal down-converted by the mixer, and an active low-pass filter removing a signal outside the bandwidth of the IF signal.

Abstract: An interface circuit includes a first and a second input terminal, a first output transistor, a second output transistor, a first output controller for implementing control according to a voltage supplied to the first and the second input terminal so that a predetermined current appears at a control terminal of the first output transistor if the first output transistor is in saturated state and supplies a predetermined current to the control terminal of the first output transistor if the first output transistor is in shutoff state, and a second output controller for implementing control according to a voltage supplied to the first and the second input terminal so that a predetermined current appears at a control terminal of the second output transistor if the second output transistor is in saturated state and supplies a predetermined current to the control terminal of the second output transistor if the second output transistor is in shutoff state.

Abstract: An image rejection mixer of reduced power dissipation includes a signal distributor supplied with local signals having a phase difference to distribute the local signals, a first and a second signal mixer for mixing the distributed local signals and RF signals having a phase difference and outputting respective IF current signals, a phase shifter for shifting in phase the respective mixed IF current signals so as to provide them with a relative phase difference of 90 degrees, and a signal adder for adding the respective phase shifted intermediate frequency current signals. The shifter shifts the phases of the respective IF current signals outputted from the first and the second signal mixers.

Abstract: A semiconductor integrated device includes a functional circuit which has a plurality of signal terminals and an ESD protective circuit for protecting the functional circuit including a pair of protective diodes connected in a reverse direction between each of the signal terminals and a power source line or a ground line. The EDS protective circuit further has a bipolar transistor having a current path between the power source line and the ground line, and a capacitor connected between a collector and a base of the bipolar transistor. The protection against the ESD effectively functions when a surge is applied between the signal terminals because the current path for flowing the discharge current is formed.

Abstract: An object of the present invention is to lower the power dissipation of the image rejection mixer. The image rejection mixer includes distribution means supplied with local signals having a phase difference to distribute the local signals, first and second mixing means for mixing the distributed local signals and RF signals having a phase difference and outputting respective IF current signals, phase shift means for shifting in phase the respective mixed IF current signals so as to provide them with a relative phase difference of 90 degrees, and addition means for adding the respective phase shifted intermediate frequency current signals. The phase shift means shifts the phases of the respective IF current signals outputted from the first and second mixing means.

Abstract: ABSTRACT OF DISCLOSURE A semiconductor integrated device including: a functional circuit having a plurality of signal terminals; and an ESD protective circuit for protecting the functional circuit including a pair of protective diodes connected in a reverse direction between each of the signal terminals and a power source line or a ground line, a bipolar transistor having a current path between the power source line and the ground line, and a capacitor connected between a collector and a base of the bipolar transistor. In the present invention, the protection against the ESD effectively functions when a surge is applied between the signal terminals because the current path for flowing the discharge current is formed.