Abstract: A memory device includes a memory cell array having stacked first and second memory decks; and a peripheral circuit coupled to the memory cell array and configured to: when performing a program operation on a selected memory cell layer in the first memory deck, apply a voltage to a word line layer corresponding to the selected memory cell layer and apply a first voltage to a word line layer corresponding to an unselected memory cell layer in the first memory deck; apply a second voltage to the word line layer corresponding to the plurality of memory cell layers in the second memory deck; and apply a third voltage to the dummy word line layer corresponding to the at least one dummy memory cell layer at the junction position of the first memory deck and the second memory deck. The first voltage exceeds the second voltage, which exceeds the third voltage.

Abstract: The embodiments of the disclosure provide a control method and apparatus for a memory, and a storage medium. The memory has memory blocks, and each memory block has memory strings. Each of the memory strings includes a channel layer with an N-type doped top region. In a memory block, a bit line erasing voltage is applied to a select bit line, and an erasing prohibition voltage is applied to an unselect bit line. A top select gate voltage lower than the bit line erasing voltage is applied to a top select gate. When a word line erasing voltage lower than the bit line erasing voltage is applied to the corresponding word line connected to a memory string corresponding to the select bit line and the unselect bit line, the memory string corresponding to the select bit line is erased.

Abstract: The present disclosure provides a method for operating a memory, a memory and a memory system, and relates to the technical field of semiconductor chip. The method includes: during the erase phase, applying an erase voltage to the word line, and applying an erase voltage to the select line coupled to a target select gate; during the program phase for select gate, applying a pass voltage to the word line, and applying a program voltage to the select line coupled to the target select gate.

Abstract: The present disclosure provides a memory device, a memory system, and an operation method of a memory device, and relates to the technical field of semiconductor chips. The memory device includes a memory cell array including a source layer, a bottom select gate layer, and a gate layer, and the bottom select gate layer is located between the source layer and the gate layer, wherein the bottom select gate layer includes a plurality of bottom select gates, and a bottom select gate of a first memory string and a bottom select gate of a second memory string are connected with a same select line; and a peripheral circuit coupled to the memory cell array, wherein the peripheral circuit is configured to apply a selection voltage to the select line to control the first memory string and the second memory string.

Abstract: According to one aspect, a method of operating a memory is provided. The method may include applying a first power supply voltage to a common source during a program precharge process. The method may include applying a first voltage to a first bottom gate line and applying a second voltage to a second bottom gate line starting at a first moment of the program precharge process. The method may include applying a second power supply voltage to the first bottom gate line and applying a third voltage to the second bottom gate line after the first moment of the program precharge process.

Abstract: The present invention relates to an FSK and LAN protocol conversion apparatus for a rail transit signal system, wherein the apparatus includes: a control instruction sending module (TC); a device state receiving module (TK); a data validity check module (VD) connected with the TC and the TK respectively; a first Ethernet redundant communication module (LAN A) connected with the VD; a second Ethernet redundant communication module (LAN B) connected with the VD; and a system configuration and maintenance module (MAN) connected with the above modules respectively. Compared with the prior art, the present invention has the advantage of implementing network access with a new ATS system of a control center on the basis of an original system, with minimized capital investment and maximized utilization of the existing station device.

Abstract: An apparatus includes a first power stage circuit having a first output and a power terminal, and a second power stage circuit having a second output and the power terminal. The apparatus further includes a control circuit having a control input, a first control output, and a second control output. In an example, the control input is coupled to the power terminal, the first control output is coupled to the first output, and the second control output is coupled to the second output. In an example, the control circuit is configured to, responsive to a first voltage at the power terminal being below a threshold voltage, set the first and second outputs to a second voltage.

Abstract: The disclosure provides a programming method of a memory, a memory and a memory system, which relate to the technical field of semiconductor chips. The programming method comprises: applying a program voltage to a first word line coupled to a plurality of memory cells of a first memory cell slice and a plurality of memory cells of a second memory cell slice; and during a stage of applying the program voltage to the first word line, applying a turn-on voltage to a first select line and a second select line sequentially, wherein the first select line is coupled to a select transistor of the first memory cell slice, and the second select line is coupled to a select transistor of the second memory cell slice.

Abstract: A 5G-TSN resource joint scheduling apparatus includes: a state information acquisition module, a scheduling decision making module, and a configuration module. The state information acquisition module is configured to acquire bottom-layer network information, and process the acquired bottom-layer network information to obtain state information, the bottom-layer network information includes channel information, gate control list information of a TSN domain, and queue information in a base station. The scheduling decision making module is configured to obtain a result of decision making based on the state information output by the state information acquisition module using a DDPG-based reinforcement learning model, the result of decision making includes whether to allocate resources for a current queue and a number of resources actually allocated to the current queue.

Abstract: A 5G-TSN resource joint scheduling apparatus includes: a state information acquisition module, a scheduling decision making module, and a configuration module. The state information acquisition module is configured to acquire bottom-layer network information, and process the acquired bottom-layer network information to obtain state information, the bottom-layer network information includes channel information, gate control list information of a TSN domain, and queue information in a base station. The scheduling decision making module is configured to obtain a result of decision making based on the state information output by the state information acquisition module using a DDPG-based reinforcement learning model, the result of decision making includes whether to allocate resources for a current queue and a number of resources actually allocated to the current queue.

Abstract: A diesel fuel injector based on a hollow spray structure induced by vortex cavitation in a nozzle, including a needle valve, a nozzle body, a plurality of spray holes, and a sac chamber. An axis of the needle valve coincides with an axis of the nozzle body. The spray holes are evenly distributed on a head of the nozzle body, and each have a converging conical structure. An inlet end of the spray hole is communicated with the sac chamber. The sac chamber consists of a hemispherical cavity and a cylindrical cavity.

Abstract: A diesel fuel injector based on a hollow spray structure induced by vortex cavitation in a nozzle, including a needle valve, a nozzle body, a plurality of spray holes, and a sac chamber. An axis of the needle valve coincides with an axis of the nozzle body. The spray holes are evenly distributed on a head of the nozzle body, and each have a converging conical structure. An inlet end of the spray hole is communicated with the sac chamber. The sac chamber consists of a hemispherical cavity and a cylindrical cavity.

Abstract: A method for combining with a minimum isolation bandwidth includes: determining an insertion loss and an isolation between ports of a combiner; calculating a total isolation bandwidth of an isolation band in the combiner according to the insertion loss and the isolation between ports; determining guard bandwidths adjacent to the isolation band in combined systems, the combined systems being at least two communication systems combined by the combiner; and, calculating an actual isolation bandwidth of the combiner according to the guard bandwidths of the combined systems and the total isolation bandwidth.

Abstract: The present disclosure provides a device for wireless access, which pertains to the technical field of wireless network. The device for wireless access includes a device body; a radio frequency circuit disposed inside the device body; and a plurality of antenna units disposed on an external surface of the device body, each of the plurality of antenna units being connected to the radio frequency circuit; wherein each of the plurality of antenna units comprises an antenna oscillator, and the antenna oscillators on each two adjacent antenna units of the plurality of antenna units are misaligned with each other. By disposing antenna oscillators of adjacent antenna units on the misaligned regions of the respective antenna unit, the interference of co-frequency signals between adjacent antenna units may be reduced, and the isolation of adjacent antenna units may be enhanced. Thus, adjacent antenna units may be disposed at a reduced distance therebetween.

Abstract: The present disclosure provides a device for wireless access, which pertains to the technical field of wireless network. The device for wireless access includes a device body; a radio frequency circuit disposed inside the device body; and a plurality of antenna units disposed on an external surface of the device body, each of the plurality of antenna units being connected to the radio frequency circuit; wherein each of the plurality of antenna units comprises an antenna oscillator, and the antenna oscillators on each two adjacent antenna units of the plurality of antenna units are misaligned with each other. By disposing antenna oscillators of adjacent antenna units on the misaligned regions of the respective antenna unit, the interference of co-frequency signals between adjacent antenna units may be reduced, and the isolation of adjacent antenna units may be enhanced. Thus, adjacent antenna units may be disposed at a reduced distance therebetween.

Abstract: A method for combining with a minimum isolation bandwidth includes: determining an insertion loss and an isolation between ports of a combiner; calculating a total isolation bandwidth of an isolation band in the combiner according to the insertion loss and the isolation between ports; determining guard bandwidths adjacent to the isolation band in combined systems, the combined systems being at least two communication systems combined by the combiner; and, calculating an actual isolation bandwidth of the combiner according to the guard bandwidths of the combined systems and the total isolation bandwidth.

Abstract: A pitch control system for a wind turbine includes a backup battery bank assigned to each pitch drive motor, with each battery bank having a plurality of individual batteries connected in series. A battery charger is connected in parallel across each battery in the battery bank. A protective circuit is configured with each battery charger and includes a voltage comparator circuit that detects a reverse voltage applied to the battery charger above a threshold value to isolate the battery charger from the reverse voltage.

Abstract: A pitch control system for a wind turbine includes a backup battery bank assigned to each pitch drive motor, with each battery bank having a plurality of individual batteries connected in series. A battery charger is connected in parallel across each battery in the battery bank. A protective circuit is configured with each battery charger and includes a voltage comparator circuit that detects a reverse voltage applied to the battery charger above a threshold value to isolate the battery charger from the reverse voltage.