Patents by Inventor Jianshi Tang
Jianshi Tang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11832534Abstract: Methods of forming variable-resistance devices include forming a variable-resistance layer between a first terminal and a second terminal from a material that varies in resistance based on an oxygen concentration. An electrolyte layer is formed over the variable-resistance layer from a material that is stable at room temperature and that conducts oxygen ions in accordance with an applied voltage. A conductive gate layer is formed over the electrolyte layer.Type: GrantFiled: December 23, 2020Date of Patent: November 28, 2023Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Teodor K Todorov, Douglas M. Bishop, Jianshi Tang, John Rozen
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Patent number: 11803360Abstract: A compilation method, a compilation apparatus suitable for an In-Memory Computing apparatus, a computing device and a storage medium. The compilation method includes: acquiring calculation information of an algorithm to be compiled; converting the algorithm to be compiled into the first intermediate representation according to the calculation information; mapping the first intermediate representation to the second intermediate representation; and compiling the algorithm to be compiled into instruction information recognized by the In-Memory Computing apparatus according to the hardware information, to make the In-Memory Computing apparatus execute the instruction information. The compilation method may compile the calculation information into instructions that may be directly executed by the In-Memory Computing apparatus, so as to realize the effect of accelerating the operations of various algorithms by using the In-Memory Computing apparatus.Type: GrantFiled: November 2, 2021Date of Patent: October 31, 2023Assignee: TSINGHUA UNIVERSITYInventors: Huaqiang Wu, Ruihua Yu, Yilong Guo, Jianshi Tang, Bin Gao, He Qian
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Patent number: 11747296Abstract: Chemical sensors and methods of forming and making the same include an input terminal and an output terminal. A negative capacitance structure is configured to control a current passing horizontally from the input terminal to the output terminal, and has a first and second metal layer that are arranged vertically with respect to one another, and a ferroelectric layer positioned between the first and second metal layers. An electrode is in electrical contact with the negative capacitance structure, and is configured to change potential, to exceed a threshold, thereby triggering a discontinuous polarization change in the negative capacitance structure.Type: GrantFiled: September 29, 2020Date of Patent: September 5, 2023Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Qing Cao, Jianshi Tang, Ning Li, Ying He
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Publication number: 20230244919Abstract: At least one embodiment of the present disclosure provides a reservoir computing apparatus and a data processing method. The reservoir computing apparatus includes: a signal input circuit, configured to receive an input signal; a reservoir circuit, including a plurality of reservoir sub-circuits, in which each reservoir sub-circuit includes a mask sub-circuit and a rotating neuron sub-circuit, the mask sub-circuit is configured to perform a first processing on the input signal with a first weight to obtain a first processing result, and the rotating neuron sub-circuit is configured to perform a second processing on the first processing result to obtain a second processing result; and an output layer circuit, configured to multiply a plurality of second processing results by a second weight matrix to obtain a third processing result. The reservoir computing apparatus optimizes operation efficiency and reduces implementation costs.Type: ApplicationFiled: January 17, 2023Publication date: August 3, 2023Applicant: TSINGHUA UNIVERSITYInventors: Huaqiang WU, Xiangpeng LIANG, Ya?nan ZHONG, Jianshi TANG, Bin GAO, He QIAN
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Patent number: 11707002Abstract: Devices with settable resistance and methods of forming the same include forming vertical dielectric structures from heterogeneous dielectric materials on a first electrode. A second electrode is formed on the vertical dielectric structures.Type: GrantFiled: April 19, 2021Date of Patent: July 18, 2023Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Jianshi Tang, Takashi Ando, Reinaldo Vega, Praneet Adusumilli
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Publication number: 20230168891Abstract: An in-memory computing processor, an in-memory computing processing system, an in-memory computing processing apparatus, and a deployment method of an algorithm model based on the in-memory computing processor are disclosed. The in-memory computing processor includes a first master control unit and a plurality of memristor processing modules, and the first master control unit is configured to be capable of dispatching and controlling the plurality of memristor processing modules, the plurality of memristor processing modules are configured to be capable of calculating under the dispatch and control of the first master control unit, and the plurality of memristor processing modules are further configured to be capable of communicating independently of the first master control unit to calculate.Type: ApplicationFiled: November 5, 2021Publication date: June 1, 2023Applicant: TSINGHUA UNIVERSITYInventors: Peng YAO, Bin GAO, Dabin WU, Hu HE, Jianshi TANG, He QIAN, Huaqiang WU
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Patent number: 11586899Abstract: A method of fabricating a neuromorphic device includes forming a variable-resistance layer between a first terminal and a second terminal, the variable-resistance layer varies in resistance based on an oxygen concentration in the variable-resistance layer. The method further includes forming an electrolyte layer over the variable-resistance layer that is stable at room temperature and that conducts oxygen ions in accordance with an applied voltage. The method further includes forming a gate layer over the electrolyte layer to apply a voltage on the electrolyte layer and the variable-resistance layer, the gate layer formed using an oxygen scavenging material.Type: GrantFiled: June 10, 2019Date of Patent: February 21, 2023Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Teodor Krassimirov Todorov, Jianshi Tang, Douglas M. Bishop, John Rozen, Takashi Ando
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Patent number: 11557724Abstract: A method is presented for enabling heat dissipation in resistive random access memory (RRAM) devices. The method includes forming a first thermal conducting layer over a bottom electrode, depositing a metal oxide liner over the first thermal conducting layer, forming a second thermal conducting layer over the metal oxide liner, recessing the second thermal conducting layer to expose the first thermal conducting layer, and forming a top electrode in direct contact with the first and second thermal conducting layers.Type: GrantFiled: September 21, 2021Date of Patent: January 17, 2023Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Takashi Ando, Praneet Adusumilli, Jianshi Tang, Reinaldo Vega
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Publication number: 20230004357Abstract: A method for generating a random number and a random number generator are provided. The method for generating a random number includes: performing n writing operations on at least one analog resistive random access memory, where each of the n writing operations includes applying at least one writing operation pulse to change a conductance value of an operated analog resistive access memory; and generating the random number based on n writing operation pulse numbers respectively corresponding to the n writing operations, where n is a positive integer. The method for generating a random number generates random numbers based on the analog characteristics of the analog resistive random access memory, the generated random number does not need back-end correction, and have both high speed and high reliability.Type: ApplicationFiled: November 13, 2020Publication date: January 5, 2023Applicant: TSINGHUA UNIVERSITYInventors: Huaqiang WU, Bohan LIN, Bin GAO, Jianshi TANG, He QIAN
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Patent number: 11545641Abstract: A method for manufacturing a semiconductor device includes forming a first dielectric layer on a substrate, forming a carbon nanotube (CNT) layer on the first dielectric layer, forming a second dielectric layer on the carbon nanotube (CNT) layer, patterning a plurality of trenches in the second dielectric layer exposing corresponding portions of the carbon nanotube (CNT) layer, forming a plurality of contacts respectively in the plurality of trenches on the exposed portions of the carbon nanotube (CNT) layer, performing a thermal annealing process to create end-bonds between the plurality of the contacts and the carbon nanotube (CNT) layer, and depositing a passivation layer on the plurality of the contacts and the second dielectric layer.Type: GrantFiled: March 3, 2020Date of Patent: January 3, 2023Assignee: International Business Machines CorporationInventors: Damon B. Farmer, Shu-Jen Han, Jianshi Tang
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Patent number: 11455521Abstract: A neuromorphic semiconductor device includes a copper-based intercalation channel disposed on an insulative layer, a source contact and a drain contact of a substrate. A copper-based electrolyte layer is disposed on the copper-based intercalation channel and a copper-based gate electrode is disposed on the copper-based electrolyte layer.Type: GrantFiled: March 1, 2019Date of Patent: September 27, 2022Assignee: International Business Machines CorporationInventors: Teodor K. Todorov, Douglas M. Bishop, Jianshi Tang, John Rozen
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Publication number: 20220275220Abstract: Embodiments of this application provide a method for preparing a thin film piezoresistive material, a thin film piezoresistive material, a robot, and a device. The method includes: determining a mass ratio of conductive particles to a cross-linked polymer in preparation of the thin film piezoresistive material, a value range of the mass ratio being 3:97 to 20:80; dispersing the conductive particles and the cross-linked polymer in a solvent according to the mass ratio, to obtain a first dispersion; and curing the first dispersion by using a liquid dropping method within a temperature range of 25° C. to 200° C., to obtain the thin film piezoresistive material. The technical solutions provided by the embodiments of this application provide a method for preparing a thin film piezoresistive material through liquid dropping, thereby effectively controlling the thickness of the piezoresistive material, so that the prepared thin film piezoresistive material has a relatively small thickness.Type: ApplicationFiled: May 18, 2022Publication date: September 1, 2022Inventors: Jianshi TANG, Zhenxuan ZHAO, Yuan DAI, Zhengyou ZHANG, Jian YUAN, Huaqiang WU, He QIAN, Bin GAO
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Publication number: 20220277866Abstract: This application discloses a conductive paste, a preparation method thereof, and a preparation method of a conductive film using the conductive paste. The conductive paste comprises: a thermoplastic polyurethane, conductive particles, and an organic solvent, the thermoplastic polyurethane and the conductive particles being proportionally mixed in the organic solvent, and the thermoplastic polyurethane being dispersed in the form of particles among the conductive particles. A thermoplastic polyurethane elastomer is used as a binder, and the conductive particles are mixed in the organic solvent containing the thermoplastic polyurethane elastomer. The conductive particles ensure the conductivity of the conductive film prepared using the conductive paste. The thermoplastic polyurethane has strong adhesion ability, and is suitable for use on the surface of most substrates, to form a conductive film with good adhesion and no cracking.Type: ApplicationFiled: May 18, 2022Publication date: September 1, 2022Inventors: Jianshi TANG, Zhenxuan ZHAO, Yuan DAI, Wangwei LEE, Zhengyou ZHANG, Jian YUAN, Huaqiang WU, He QIAN, Bin GAO
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Publication number: 20220225921Abstract: A microelectrode, a method for manufacturing the microelectrode, a method for using the microelectrode, an occluding device, and a microelectrode system are provided. The microelectrode (10) includes a substrate (110) and a conductive layer (120) on the substrate (110), and the conductive layer (120) is configured to conduct an electrical signal. The substrate (110) is a flexible substrate and includes a cavity structure (111), and the cavity structure (111) is configured to contain or release a fluid. The hardness of the substrate (110) in the case where the cavity structure (111) contains the fluid is different from the hardness of the substrate (110) in the case where the cavity structure (111) does not contain the fluid. The microelectrode has good ductility and stable electrical performance, and the microelectrode is easy to be implanted into the biological tissue and not easy to result in the immune reaction of the biological tissue.Type: ApplicationFiled: November 19, 2020Publication date: July 21, 2022Applicant: TSINGHUA UNIVERSITYInventors: Huaqiang WU, Jianshi TANG, Jian YUAN
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Publication number: 20220137941Abstract: A compilation method, a compilation apparatus suitable for an In-Memory Computing apparatus, a computing device and a storage medium. The compilation method includes: acquiring calculation information of an algorithm to be compiled; converting the algorithm to be compiled into the first intermediate representation according to the calculation information; mapping the first intermediate representation to the second intermediate representation; and compiling the algorithm to be compiled into instruction information recognized by the In-Memory Computing apparatus according to the hardware information, to make the In-Memory Computing apparatus execute the instruction information. The compilation method may compile the calculation information into instructions that may be directly executed by the In-Memory Computing apparatus, so as to realize the effect of accelerating the operations of various algorithms by using the In-Memory Computing apparatus.Type: ApplicationFiled: November 2, 2021Publication date: May 5, 2022Applicant: TSINGHUA UNIVERSITYInventors: Huaqiang WU, Ruihua YU, Yilong GUO, Jianshi TANG, Bin GAO, He QIAN
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Publication number: 20220061729Abstract: A signal processing apparatus and a signal processing method are provided. The signal processing apparatus includes a memristor array, an input circuit, a first switching circuit, a second switching circuit, an output circuit, and a control circuit. The memristor array includes memristor units and is connected to source lines, word lines and bit lines. The control circuit is configured to control the first switching circuit to select at least one source line to apply at least one first signal to the at least one source line respectively, control the second switching circuit to select and activate at least one word line to apply the at least one first signal to a memristor unit corresponding to the at least one word line, and control the output circuit to output a plurality of second signals based on conductivity values of memristors of the memristor array.Type: ApplicationFiled: August 25, 2021Publication date: March 3, 2022Applicant: Tsinghua UniversityInventors: Huaqiang WU, Zhengwu LIU, Jianshi TANG, Bin GAO, He QIAN
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Publication number: 20220047200Abstract: An information processing circuit and an information processing method. The information processing circuit includes: a signal acquisition circuit and a signal processing circuit, the signal acquisition circuit is configured to acquire a plurality of initial neural signals that are different, the signal processing circuit includes a plurality of memristors and is configured to process the plurality of initial neural signals through the plurality of memristors, and the plurality of memristors includes a plurality of first memristors, the plurality of first memristors are arranged in an array to obtain a preprocessing array, the preprocessing array is configured to extract features of the plurality of initial neural signals to obtain a plurality of feature information.Type: ApplicationFiled: August 13, 2021Publication date: February 17, 2022Applicant: TSINGHUA UNIVERSITYInventors: Huaqiang WU, Zhengwu LIU, Bin GAO, Jianshi TANG, He QIAN
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Patent number: 11237160Abstract: Chemical sensors include a functionalized electrode configured to change surface potential in the presence of an analyte. A piezoelectric element is connected to the functionalized electrode. A piezoresistive element is in contact with the piezoelectric element.Type: GrantFiled: May 15, 2019Date of Patent: February 1, 2022Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Qing Cao, Jianshi Tang, Ning Li, Ying He
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Publication number: 20220006009Abstract: A method is presented for enabling heat dissipation in resistive random access memory (RRAM) devices. The method includes forming a first thermal conducting layer over a bottom electrode, depositing a metal oxide liner over the first thermal conducting layer, forming a second thermal conducting layer over the metal oxide liner, recessing the second thermal conducting layer to expose the first thermal conducting layer, and forming a top electrode in direct contact with the first and second thermal conducting layers.Type: ApplicationFiled: September 21, 2021Publication date: January 6, 2022Inventors: Takashi Ando, Praneet Adusumilli, Jianshi Tang, Reinaldo Vega
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Patent number: 11211429Abstract: Vertically stacked memory devices and methods of manufacture are provided. The structures include a substrate stack including a first row of horizontal electrodes disposed over a first insulating layer and first insulating layer disposed over a substrate. The substrate stack further includes a second row of horizontal electrodes separated from the first row of horizontal electrodes by a second insulating layer, and the first row of horizontal electrodes is form over and substantially parallel to the second row of horizontal electrodes. A third insulating layer is formed over the second row of horizontal electrodes. A plurality of vertical gate trenches formed through the third insulating layer, the second row of horizontal electrodes, the second insulating layer, the first row of horizontal electrodes and the first insulating layer. The plurality of vertical gate trenches filled with a layer of channel material, a layer of electrolyte material and filled with a metal.Type: GrantFiled: February 26, 2019Date of Patent: December 28, 2021Assignee: International Business Machines CorporationInventors: Jianshi Tang, Takashi Ando, Reinaldo Vega