Abstract: An array substrate, a shift register unit and a display apparatus are provided. The array substrate includes data lines, gate lines, first control signal lines and sub-pixels. The sub-pixel includes a first sub-pixel portion including a first pixel electrode and a first transistor, and a second sub-pixel portion including a second pixel electrode, a second transistor and a third transistor; the first transistor is connected with the first pixel electrode the second transistor and the third transistor are connected with the second pixel electrode, the first transistor and the second transistor are connected with a same gate line and a same data line, and the third transistor is connected with the first control signal line. The second sub-pixel portion includes an adjustable capacitor connecting with the third transistor, and the array substrate further includes a second control signal line connected with the adjustable capacitor.

Abstract: A multi-viewpoint image processing system includes a processing apparatus and a display apparatus, the processing apparatus includes an acquisition module and an encoding module, wherein the acquisition module is configured to acquire K viewpoint images, and a viewpoint image includes M rows and N columns of pixels; the encoding module is configured to receive the K viewpoint images, encode the K viewpoint images to generate a plurality of encoded images, and send the plurality of encoded images to the display apparatus; the display apparatus is configured to receive the plurality of encoded images and obtain M pieces of display information according to the plurality of encoded images, an i-th piece of display information including i-th rows of pixels of the K viewpoint images, i=1, 2, . . . , M; and perform stereoscopic display according to the M pieces of display information.

Abstract: A distributed photovoltaic regulation method considering safety verification includes acquiring power transmission or power substation equipment limit value, load condition, and distributed photovoltaic aggregation information under equipment, calculating load rate of equipment, calculating total maximum regulation amount or the total over-limit correction amount of distributed photovoltaic power under equipment based on the load rate of equipment and a threshold value, and decomposing total maximum regulation amount or total over-limit correction amount to obtain respective total maximum regulation amount or total over-limit correction amount of each load point; and decomposing respective total maximum regulation amount or total over-limit correction amount of each load point to obtain respective maximum regulation amount or over-limit correction amount of each automatic power generation control unit, correcting respective regulation requirement and generating respective regulation target of each automatic p

Abstract: A display panel, comprising open areas; a non-open area; an array substrate comprising a first substrate and gate lines, data lines, thin film transistors and raised portions located in the non-open area, wherein orthographic projections of the data lines on the first substrate have overlaps with orthographic projections of the gate lines on the first substrate, orthographic projections of the raised portions on the first substrate are located within the orthographic projections of the gate lines on the first substrate; and a color filter substrate comprising a second substrate and spacers located on a side of the second substrate; wherein orthographic projections of the spacers on the first substrate have overlaps with the orthographic projections of the raised portions and overlapping parts of the data lines and the gate lines on the first substrate.

Abstract: A pixel electrode, an array substrate, and a display device are provided. The pixel electrode includes: a first edge conductive part and a second edge conductive part arranged at intervals in a first direction, and a main conductive part at least partially located between the first edge conductive part and the second edge conductive part. The main conductive part is respectively connected to the first edge conductive part and the second edge conductive part. The main conductive part includes at least one first group of sub-conductive parts and at least one second group of sub-conductive parts. The first group of sub-conductive parts and the second group of sub-conductive parts are arranged alternately in the first direction.

Abstract: A display driving method and a display device are provided. The display driving method includes: scanning a plurality of subpixels arranged in an N?M array row by row or in multiple rows to turn on each row of scanned subpixels, so that the duration when two adjacent rows of subpixels are simultaneously in a turn-on state is greater than or equal to two times a unit scan time, the unit scan time being the time required for scanning one row of subpixels, and N and M both being integers greater than 1; and applying data signals to at least two rows of subpixels that are simultaneously in the turn-on state, so that the duration when data signals are applied to at least some rows of subpixels is greater than the unit scan time.

Abstract: The present disclosure relates to a touch display device and a driving method for the touch display device. The touch display device comprises data lines, gate lines, pixel electrodes located within display areas defined by the data lines and the gate lines, and a driving circuit. The driving circuit is configured to provide a first display data signal to the data lines during a display stage of the touch display device, and is configured to provide a second display data signal to the data lines during a predetermined period adjacent to the display stage within a touch stage of the touch display device, and provide an off-signal to the gate lines during the predetermined period such that the second display data signal is not provided to the pixel electrodes.

Abstract: An electrode structure, a display panel, an electronic device are provided, the electrode structure includes a first electrode portion, a second electrode portion and a conductive connection portion, the first electrode portion includes a first connection bar having a first side and a second side and a plurality of first electrode strips, ends of adjacent first electrode strips away from the first connection bar are open; the second electrode portion includes a second connection bar at a position of the first side away from the second side and a plurality of second electrode strips, the second connection bar includes a third side and a fourth side; the second electrode strips are connected with the second connection bar, ends of adjacent second electrode strips away from the second connection bar are open; ends of the conductive connection portion are connected with the first connection bar and the second connection bar.

Abstract: A display substrate, including: a base substrate; a plurality of data lines on the base substrate; a first insulating layer on a side of the plurality of data lines away from the base substrate; a plurality of gate lines on a side of the first insulating layer away from the plurality of data lines, where extension directions of the gate and data lines are intersected; a second insulating layer on a side of the plurality of gate lines away from the first insulating layer; and a first electrode on a side of the second insulating layer away from the plurality of gate lines, where at least a portion of an orthographic projection of the first electrode on the base substrate is within an region surrounded by orthographic projections of two adjacent data lines on the base substrate and orthographic projections of two adjacent gate lines on the base substrate.

Abstract: A display panel, a driving method for the display panel and a display device. The display panel includes a gate driving circuit, the gate driving circuit includes shift registers of a plurality of stages arranged in sequence, the shift registers of the plurality of stages arranged in sequence are combined into N groups of gate driving sub-circuits, and shift registers in the N groups of gate driving sub-circuits are cascaded, respectively; an m-th group of gate driving sub-circuits in the N groups of gate driving sub-circuits includes a shift register of an m-th stage and a shift register of an (m+L*N)-th stage that are cascaded, where m is an integer that is greater than or equal to 1 and less than or equal to N.

Abstract: The present disclosure provides a display panel and a manufacturing method therefor, and a display apparatus, which relate to the technical field of displaying. The display panel includes a first base plate and a second base plate which are aligned with each other; the first base plate includes a first substrate and a thin film transistor; the thin film transistor includes an active layer; an optical adjustment layer is disposed on the second base plate; an orthographic projection of the optical adjustment layer on the first substrate overlaps with an orthographic projection of the active layer on the first substrate. That is, the optical adjustment layer corresponds to the active layer. In a laminating direction of the display panel, the existence of the optical adjustment layer with a certain height enables a reflecting surface of the second base plate to be closer to the first base plate.

Abstract: The present disclosure provides a display substrate and a display device. The display substrate includes a base substrate and a driving circuit arranged on the base substrate. The driving circuit includes multiple denoising transistors and multiple transistors for driving, and the denoising transistors are electrically connected to a pull-up node. A length of a channel of each of at least a part of the denoising transistors is a first length L1, a length of a channel of each of at least a part of the multiple transistors for driving is a second length L2, and the first length L1 is not equal to the second length L2.

Abstract: The disclosure provides a pixel driving method, a pixel driving circuit and a display device.

Abstract: Provided are a display substrate and a display device. The first display region includes at least two domains spaced apart in the first direction and a first space between the at least two domains, the second display region includes at least two domains spaced apart in the first direction and a second space located between the at least two domains of the second display region; each pixel units further includes a discharge line and a common electrode strip, the discharge line includes a first conductive part and a second conductive part, the first conductive part is at the first space, the second conductive part is at the second space, the common electrode strip is at an edge of the first display region adjacent to the data lines, and no common electrode strip is arranged on an edge of the second display region adjacent to the data lines.

Abstract: A display panel, including: a substrate including a display region and a non-display region; a second conductive layer including more than one gate line located in the display region, and more than one virtual gate line located in the non-display region; a virtual conductive part, located in the non-display region, where the virtual conductive part is located in a different conductive layer from the virtual gate line, an orthographic projection of the virtual conductive part on the substrate is located within an orthographic projection of the virtual gate line on the substrate, and the virtual conductive part is configured to form an equivalent capacitance with the virtual gate line; and a RC load of the virtual gate line matches with a RC load of the gate line.

Abstract: A driving method for a display panel and a display apparatus. The driving method includes: acquiring display data of a to-be-displayed image in a current display frame (S100); and loading a data voltage on a data line in the display panel according to the display data, such that each sub-pixel in the display panel is charged with the corresponding data voltage (S200).

Abstract: A temperature control circuit of a driver chip, a temperature control method of the driver chip, a power management integrated chip, a timing control driver board and a display apparatus are disclosed. The temperature control circuit includes a switching transistor, a comparison circuit and a control circuit; a first electrode of the switching transistor is connected with a first node, a second comparison end and the first electrode or a second electrode of the switching transistor are connected to a second node; the control circuit is configured to output a first reference voltage to the comparison circuit, the comparison circuit is configured to compare a magnitude relationship between a voltage on the second comparison end and the first reference voltage and output a comparison result: the control circuit acquires the comparison result and determines whether an output current on the boost circuit is excessively large.

Abstract: An electrode structure, a display panel, an electronic device are provided, the electrode structure includes a first electrode portion, a second electrode portion and a conductive connection portion, the first electrode portion includes a first connection bar having a first side and a second side and a plurality of first electrode strips, ends of adjacent first electrode strips away from the first connection bar are open; the second electrode portion includes a second connection bar at a position of the first side away from the second side and a plurality of second electrode strips, the second connection bar includes a third side and a fourth side; the second electrode strips are connected with the second connection bar, ends of adjacent second electrode strips away from the second connection bar are open; ends of the conductive connection portion are connected with the first connection bar and the second connection bar.

Abstract: The present disclosure provides a gate driving circuit and a display panel. The display panel includes a display area and a peripheral area surrounding the display area. At least one gate driving circuit is arranged in the peripheral area. The at least one gate driving circuit includes a plurality of shift register units cascaded in sequence. The plurality of shift register units include first shift register units and second shift register units. The first shift register units and the second shift register units are spaced apart from each other. The number of transistors in the first shift register units is smaller than the number of transistors in the second shift register units.

Abstract: The present disclosure provides an array substrate, a method for manufacturing the array substrate, and a display apparatus. The array substrate includes: a base substrate, a thin film transistor disposed on the base substrate; a first passivation layer, an organic film layer and a pixel electrode disposed on the thin film transistor; a connection structure for connecting the source electrode of the thin film transistor and the pixel electrode, wherein the connection structure is disposed in a via hole structure exposing the pixel electrode and the source electrode; or, the connection structure is disposed between the pixel electrode and the source electrode.