Patents by Inventor Jianwei Zhuang

Jianwei Zhuang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220358599
    Abstract: Insurance Verification-as-a-Service (IVaaS) systems and methods include receiving coverage compliance criteria for one or more third-parties, wherein third-parties are placed in unique groups and are evaluated based on coverage criteria established for the unique groups; evaluating compliance for the one or more third-parties based on the received coverage compliance criteria; and performing one of a plurality of actions based on the compliance of the one or more third-parties, wherein the plurality of actions include communicating directly with a third-party and the third-parties insurance provider by creating various requests based on the compliance and issues of coverage of the third-parties.
    Type: Application
    Filed: July 19, 2022
    Publication date: November 10, 2022
    Inventors: Vikas Sood, William David Thomas, Nathan Rowe, Jianwei Zhuang
  • Patent number: 11163706
    Abstract: A method for improving performance of a host bus adapter in a data storage system is disclosed. In one embodiment, such a method uses, as an interface to a memory controller contained within a host bus adapter, multiple two-way ports configured to operate in parallel. The method uses, within each two-way port, a read FIFO buffer for transferring read data across the two-way port and a write FIFO buffer for transferring write data across the two-way port. The method also uses the read FIFO buffer and the write FIFO buffer within each two-way port to provide speed-matching for different clock speeds that operate on opposite sides of the two-way port. A corresponding system and computer program product are also disclosed.
    Type: Grant
    Filed: October 22, 2019
    Date of Patent: November 2, 2021
    Assignee: International Business Machines Corporation
    Inventors: Bitwoded Okbay, Michael J. Palmer, Jianwei Zhuang, Ailoan Tran
  • Patent number: 11023400
    Abstract: A method for improving performance of a direct memory access (DMA) transfer is disclosed. The method generates a descriptor that describes parameters of a DMA transfer to be performed by a DMA engine, such as a DMA engine within a host bus adapter of a data storage system. The method provides, in the descriptor, a field that describes an operation to be performed by the DMA engine. The field has as options an echo read operation, a dual write operation, a loop DDs operation, and a normal DMA transfer operation. The method provides the descriptor to the DMA engine. The DMA engine extracts the operation from the field and performs the operation. This operation may, in certain embodiments, move data through a host bus adapter of a data storage system. A corresponding system and computer program product are also disclosed.
    Type: Grant
    Filed: January 20, 2020
    Date of Patent: June 1, 2021
    Assignee: International Business Machines Corporation
    Inventors: Jianwei Zhuang, Michael J. Palmer, Bitwoded Okbay, Ailoan Tran
  • Publication number: 20210117348
    Abstract: A method for improving performance of a host bus adapter in a data storage system is disclosed. In one embodiment, such a method uses, as an interface to a memory controller contained within a host bus adapter, multiple two-way ports configured to operate in parallel. The method uses, within each two-way port, a read FIFO buffer for transferring read data across the two-way port and a write FIFO buffer for transferring write data across the two-way port. The method also uses the read FIFO buffer and the write FIFO buffer within each two-way port to provide speed-matching for different clock speeds that operate on opposite sides of the two-way port. A corresponding system and computer program product are also disclosed.
    Type: Application
    Filed: October 22, 2019
    Publication date: April 22, 2021
    Applicant: International Business Machines Corporation
    Inventors: Bitwoded Okbay, Michael J. Palmer, Jianwei Zhuang, Ailoan Tran
  • Publication number: 20080195896
    Abstract: The present invention relates to a method for the real-time detection and prevention or correction of errors within an IC environment. The method comprises the steps of determining an event, or a sequence of events set, wherein these event set serve as triggers for a defect event within an IC, and configuring a logic analyzer that is embedded within the IC to monitor the operations of the IC in order to detect occurrences of defect event triggers within the IC. Further, the IC defect event trigger information is transmitted from the embedded logic analyzer to an IC hardware sequencer, wherein the hardware sequencer is configured to initiate actions to correct the defect event.
    Type: Application
    Filed: February 14, 2007
    Publication date: August 14, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Lih-Chung Kuo, Ailoan Thi Tran, Jianwei Zhuang