Abstract: An electronic parking mechanism that includes a parking cam assembly, a pawl assembly and a parking gear. The parking cam assembly includes a parking guide shaft and a parking cam that is sleeved on the parking guide shaft, and one side of the parking cam is provided with an arc protrusion along a circumferential direction so that as the parking cam rotates, the pawl assembly is in a first position where the pawl assembly parks in the parking gear and a second position where the pawl assembly parks out the parking gear, respectively. The pawl assembly includes a pawl and a pawl shaft, an upper part of the pawl contacts the parking cam, the pawl shaft is provided on a side of the pawl that can rotate around the pawl shaft.

Abstract: Circuits, architectures, a system and methods for providing multiple power rails to a plurality of standard cells in a region of an integrated circuit. The circuitry generally includes a plurality of cells configured for connection to a first or second power rail, the first power rail providing a first voltage to at least one of the plurality of cells, and the second power rail providing a second voltage (which may be independent from the first voltage) to remaining cells in the plurality of cells. The method generally includes routing, in an IC layout, a first power rail providing a first voltage and a second power rail providing a second voltage, placing the plurality of cells, and selectively connecting first and second subsets of the plurality of cells to the first and second power rails, respectively. The present invention further advantageously minimizes regional layout design considerations and time delays.

Abstract: Circuits, architectures, a system and methods for providing multiple power rails to a plurality of standard cells in a region of an integrated circuit. The circuitry generally includes a plurality of cells configured for connection to a first or second power rail, the first power rail providing a first voltage to at least one of the plurality of cells, and the second power rail providing a second voltage (which may be independent from the first voltage) to remaining cells in the plurality of cells. The method generally includes routing, in an IC layout, a first power rail providing a first voltage and a second power rail providing a second voltage, placing the plurality of cells, and selectively connecting first and second subsets of the plurality of cells to the first and second power rails, respectively. The present invention further advantageously minimizes regional layout design considerations and time delays.