Abstract: Technologies for selecting a gateway for processing a request from a user system are described. Embodiments receive the request from the user system, where the request includes user profile data including a transaction request and associated user data. Embodiments identify gateways that are available to process the request. Embodiments sample historical gateway data for the available gateways using a sampling function optimized for at least two different optimization parameters. Embodiments select, by a first trained machine learning model trained based on the sampled historical gateway data, a gateway from the available gateways. Embodiments communicate the request to the selected gateway. Embodiments receive, from the selected gateway, a response that indicates a success or failure of the request.

Abstract: The present application discloses a method for manufacturing a source/drain epitaxial layer of an FDSOI MOSFET, comprising: step 1, forming a shallow trench isolation on an FDSOI substrate; step 2, opening a formation region of a source/drain region of the MOSFET; step 3, performing first epitaxial growth to form a first pure silicon epitaxial layer; step 4, performing a first etching process to remove polysilicon particles generated from step 3; and step 5, performing epitaxial growth to sequentially form a second source/drain epitaxial seed layer, a third source/drain epitaxial bulk layer, and a fourth source/drain epitaxial cap layer on a surface of the first pure silicon epitaxial layer, so the four epitaxial layers are stacked to form the source/drain epitaxial layer.

Abstract: The present application discloses an epitaxial growth method for an FDSOI hybrid region, comprising: step 1, providing an FDSOI substrate structure; step 2, forming a trench; step 3, performing first isotropic epitaxial growth, wherein a top surface of a first semiconductor epitaxial sublayer is located in a plane between a top surface and a bottom surface of a dielectric buried layer, and a second semiconductor epitaxial sublayer comprise a lateral protruding structure on the side face of the semiconductor top layer; and step 4, performing second epitaxial growth having a growth rate of the first crystalline face, which is greater than a growth rate of the second crystalline face, wherein the third semiconductor epitaxial sublayer has a chamfered recess near the side face of the semiconductor top layer, finally the lateral protruding structure is located in the chamfered recess.

Abstract: The present application provides a reaction device for improving epitaxial growth uniformity, provided with a main inject port on one side and an exhaust port on the other side, wherein a base is provided between the main inject port and the exhaust port; the reaction cavity is provided with first and second inject pipes; the length directions of the first and second inject pipes are perpendicular to a connecting line between the main inject port and the exhaust port; the lengths of the first and second inject pipes are both equal to the radius of the base; the first and second inject pipes are located in a straight line along the length directions; the first and second inject pipes are each provided with a plurality of holes; and the plurality of holes on the first and second inject pipes are located above the wafer placed on the base.