Patents by Inventor Jiaqi Yang

Jiaqi Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11970830
    Abstract: The present disclosure discloses a method for quantifying a bearing capacity of foundation containing shallow-hidden spherical cavities, comprising: in Step 1, constructing a spatial axisymmetric calculation model for stability analysis of the foundation containing shallow-hidden spherical cavities; in Step 2, solving the model to obtain a general solution which reflects the spatial stress distribution of surrounding rock containing shallow-hidden spherical cavities; in Step 3, obtain a mathematical expression by derivation for calculating the bearing capacity of the foundation containing shallow-hidden spherical cavities; and in Step 4: completing the determination of the foundation bearing capacity. Benefits: This method has many advantages such as comprehensive consideration, high accuracy and reliability of calculation results, and may provide the scientific basis for the development of prevention and control against the instability of the foundation containing shallow-hidden cavities.
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: April 30, 2024
    Assignee: HAINAN UNIVERSITY
    Inventors: Peng Xie, Zurun Yue, Haijia Wen, Ying Teng, Shuqi Yang, Jiaqi Li, Lei Yan, Yuxuan Yang, Shaolong Jie, Bingyang Liu, Jingjing Fu, Jing Xie, Zhichao Du, Di Yin
  • Patent number: 11967115
    Abstract: The present disclosure discloses a color matching evaluation method combining similarity measure and visual perception. The method includes: firstly, constructing an image database with rich color information; extracting main colors from an acquired image using an improved clustering method for color matching; generating a corresponding palette using an intelligent color matching recommendation system, and evaluating a palette similarity using a minimum color difference model; then, recoloring the corresponding image using the generated palette through an image recoloring technology to obtain a recolored image, and calculating a structural similarity between the source image and the recolored image; performing feature level adaptive weighted fusion on the palette similarity and the structural similarity, and performing an eye movement tracking experiment on the source image and the recolored image to obtain visual perception data of the images.
    Type: Grant
    Filed: December 28, 2023
    Date of Patent: April 23, 2024
    Assignee: WUHAN TEXTILE UNIVERSITY
    Inventors: Li Yuan, Jiaqi Xiong, Jiachen Shen, Shengjie Yang, Xinru Wu
  • Publication number: 20240123342
    Abstract: This application discloses a method for moving a virtual character's perspective in a virtual environment performed at a terminal. The method includes: displaying a first perspective image of an application program observed using a first perspective direction, the first perspective image including first and second function controls; switching the first perspective image to a second perspective image according to the first perspective movement operation on the first function control, the second perspective image being an image of the virtual environment observed using a second perspective direction; receiving a second perspective movement operation on the second function control while the first function control is in an enabled state; and switching the second perspective image to a third perspective image according to the second perspective movement operation on the second function control, the third perspective image being an image of the virtual environment observed using a third perspective direction.
    Type: Application
    Filed: December 14, 2023
    Publication date: April 18, 2024
    Inventors: Jiaqi Pan, Jin Yang
  • Publication number: 20240123347
    Abstract: The present disclosure relates to a game interactive control method and apparatus, a storage medium and an electronic device, and relates to the technical field of computers. According to the method, by determining the game intention of the agent according to the game state information, and inputting the game state information, the game communication information and the game intention into the communication prediction model, the target communication content corresponding to the agent is obtained, and then the target communication content is outputted, so that the player character determines a game action to be executed by the agent based on the target communication content. This can not only improve the gaming activity when the real player is battling against the agent, but also enable the real player to know the game intention of the agent so as to cooperate with the agent and improve the gaming quality.
    Type: Application
    Filed: September 13, 2023
    Publication date: April 18, 2024
    Inventors: Xueying Du, Chi Li, Yutong Yang, Guoan Han, Jiaqi Shi, Bei Shi, Hongliang Li
  • Publication number: 20240123344
    Abstract: Related to are a method and apparatus for game role interaction control, a storage medium, and an electronic device. In the method, a target communication period of an intelligent agent may be dynamically adjusted by the current signal communication information triggered by a game match and the current game state information of the game match, to adjust the frequency of the intelligent agent for sending communication messages in the game match. Therefore, in the case of active communication of real players, the intelligent agent can be prevented from frequently sending communication messages, resulting in a conflict with the communication messages of the real players, and the interference of excessive communication messages on the real players can also be prevented. Moreover, in the case of no communication of the real players, the communication willingness of the real players can be motivated, thereby ensuring a good battle atmosphere for the game match.
    Type: Application
    Filed: September 14, 2023
    Publication date: April 18, 2024
    Inventors: Yutong YANG, Guoan HAN, Xueying DU, Jiaqi SHI, CHI LI, Bei SHI, Hongliang LI
  • Publication number: 20240123348
    Abstract: The present disclosure relates to the technical field of computers, and in particular to a game character control method and apparatus, a storage medium and an electronic device. In the method, game state information of a game match is adjusted according to game alignments to which an intelligent agent and a player character belong, so as to obtain target state information, a target game intention of the intelligent agent is determined according to the target state information, then a target operation of the intelligent agent in the game match is determined according to the target state information and the target game intention, and the target operation executed by the intelligent agent may be adjusted according to different game situations, so that the intelligent agent can flexibly adjust game actions to provide different playing methods in a human-computer battle.
    Type: Application
    Filed: September 13, 2023
    Publication date: April 18, 2024
    Inventors: Guoan HAN, Xueying DU, Chi LI, Yutong YANG, Jiaqi SHI, Bei SHI, Hongliang LI
  • Publication number: 20240123341
    Abstract: A method, apparatus, electronic device and storage medium for combat control are provided. The method comprising: determining, according to current game status data and communication information of the target object, a communicated strategic intention of a target object, wherein the communicated strategic intention characterizes a combat target expressed by the communication information; determining, according to the game status data, an initial strategic intention of a virtual object in response to the game state data; determining, according to the initial strategic intention and the communicated strategic intention, the target strategic intention of the virtual object; determining a response action of the virtual object based on the target strategic intention, and controlling the virtual object to perform the response action.
    Type: Application
    Filed: October 12, 2023
    Publication date: April 18, 2024
    Inventors: Chi LI, Xueying DU, Guoan HAN, Yutong YANG, Jiaqi SHI, Bei SHI, Hongliang LI
  • Patent number: 11783569
    Abstract: Disclosed is a method for classifying hyperspectral images on the basis of an adaptive multi-scale feature extraction model, the method comprising: establishing a framework comprising the two parts of a scale reference network and a feature extraction network, introducing a condition gate mechanism into the scale reference network, performing determination step-by-step by means of three groups of modules, inputting features into a corresponding scale extraction network, deep mining rich information contained in a hyperspectral remote sensing image, effectively combining features of different scales, improving a classification effect, and generating a fine classification result map.
    Type: Grant
    Filed: April 18, 2023
    Date of Patent: October 10, 2023
    Assignee: WUHAN UNIVERSITY
    Inventors: Bo Du, Jiaqi Yang, Liangpei Zhang, Chen Wu
  • Publication number: 20230252761
    Abstract: Disclosed is a method for classifying hyperspectral images on the basis of an adaptive multi-scale feature extraction model, the method comprising: establishing a framework comprising the two parts of a scale reference network and a feature extraction network, introducing a condition gate mechanism into the scale reference network, performing determination step-by-step by means of three groups of modules, inputting features into a corresponding scale extraction network, deep mining rich information contained in a hyperspectral remote sensing image, effectively combining features of different scales, improving a classification effect, and generating a fine classification result map.
    Type: Application
    Filed: April 18, 2023
    Publication date: August 10, 2023
    Applicant: WUHAN UNIVERSITY
    Inventors: Bo DU, Jiaqi YANG, Liangpei ZHANG, Chen WU
  • Patent number: 10672669
    Abstract: A semiconductor device includes a semiconductor substrate, an interlayer dielectric layer on the semiconductor substrate, a plurality of trenches extending through the interlayer dielectric layer to the semiconductor substrate and comprising a first trench of a PMOS device and a second trench of an NMOS device, a high-k dielectric layer on a bottom and sidewalls of the trenches, a PMOS work function adjustment layer on the high-k dielectric layer in the first trench, an NMOS work function adjustment layer on the high-k dielectric layer in the second trench, and a metal electrode layer on the PMOS work function adjustment layer in the first trench and on the NMOS work function adjustment layer in the second trench.
    Type: Grant
    Filed: August 8, 2019
    Date of Patent: June 2, 2020
    Assignees: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION, SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
    Inventors: Jiaqi Yang, Jie Zhao
  • Patent number: 10566243
    Abstract: A method of manufacturing a semiconductor device includes providing a substrate structure including a semiconductor substrate, an interlayer dielectric layer on the semiconductor substrate, multiple trenches extending through the interlayer dielectric layer to the semiconductor substrate and including a first trench of a first NMOS device and a second trench of a second NMOS device, and a dielectric layer on sidewalls and a bottom of the trenches, forming an NMOS work function adjustment layer on the dielectric layer, performing a first oxidation treatment on the NMOS work function adjustment layer in the first trench to form a first oxide layer, and a second oxidation treatment on the NMOS work function adjustment layer in the second trench to form a second oxide layer, and forming a metal electrode layer in the trenches. The first oxide layer has an oxygen content lower than that of the second oxide layer.
    Type: Grant
    Filed: March 13, 2018
    Date of Patent: February 18, 2020
    Assignees: SEMICONDUCTOR MANUFACTURING INTERNATIONATIONAL (SHANGHAI) CORPORATION, SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
    Inventors: Jiaqi Yang, Jie Zhao
  • Publication number: 20190363025
    Abstract: A semiconductor device includes a semiconductor substrate, an interlayer dielectric layer on the semiconductor substrate, a plurality of trenches extending through the interlayer dielectric layer to the semiconductor substrate and comprising a first trench of a PMOS device and a second trench of an NMOS device, a high-k dielectric layer on a bottom and sidewalls of the trenches, a PMOS work function adjustment layer on the high-k dielectric layer in the first trench, an NMOS work function adjustment layer on the high-k dielectric layer in the second trench, and a metal electrode layer on the PMOS work function adjustment layer in the first trench and on the NMOS work function adjustment layer in the second trench.
    Type: Application
    Filed: August 8, 2019
    Publication date: November 28, 2019
    Applicants: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventors: Jiaqi Yang, Jie Zhao
  • Patent number: 10418287
    Abstract: A method of manufacturing a semiconductor device includes providing a substrate structure including a semiconductor substrate, an interlayer dielectric layer on the semiconductor substrate, multiple trenches extending through the interlayer dielectric layer to the semiconductor substrate and having a first trench of a PMOS device and a second trench of an NMOS device, and a high-k dielectric layer on sidewalls and a bottom of the trenches. The method also includes forming a semiconductor layer filling the trenches, removing the semiconductor layer in the first trench, forming a PMOS work function adjustment layer in the first trench and a metal electrode layer on the PMOS work function adjustment layer in the first trench, removing the semiconductor layer in the second trench, and forming an NMOS work function adjustment layer in the second trench and a metal electrode layer on the NMOS work function adjustment layer in the second trench.
    Type: Grant
    Filed: February 12, 2018
    Date of Patent: September 17, 2019
    Assignees: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION, SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
    Inventors: Jiaqi Yang, Jie Zhao
  • Patent number: 10393905
    Abstract: A method for torsional wave logging in a borehole of a subterranean formation. The method includes obtaining a torsional wave measurement of the borehole, wherein the torsional wave measurement represents characteristics of a torsional wave propagating within a cylindrical layered structure associated with the borehole, wherein the cylindrical layered structure comprises the subterranean formation and a completion of the borehole, analyzing, by a computer processor, the torsional wave measurement to generate a quality measure of the completion, and displaying the quality measure of the completion.
    Type: Grant
    Filed: August 16, 2016
    Date of Patent: August 27, 2019
    Assignee: SCHLUMBERGER TECHNOLOGY CORPORATION
    Inventors: Bikash K. Sinha, Sandip Bose, Jiaqi Yang, Ting Lei, Tarek M. Habashy, Smaine Zeroug, Ma Luo
  • Patent number: 10138727
    Abstract: Apparatus and method for characterizing a barrier installed in a borehole traversing a formation including locating an acoustic tool with a receiver and a transmitter at a location in the borehole, activating the acoustic tool to form acoustic waveforms, wherein the receiver records the acoustic waveforms, and processing the waveforms to identify barrier parameters as a function of azimuth and depth along the borehole, wherein the waveforms comprise at least two of sonic signals, ultrasonic pulse-echo signals, and ultrasonic pitch-catch signals.
    Type: Grant
    Filed: January 31, 2014
    Date of Patent: November 27, 2018
    Assignee: SCHLUMBERGER TECHNOLOGY CORPORATION
    Inventors: Smaine Zeroug, Bikash K. Sinha, Sandip Bose, Jiaqi Yang, Ting Lei, Ram Sunder Kalyanaraman
  • Publication number: 20180269106
    Abstract: A method of manufacturing a semiconductor device includes providing a substrate structure including a semiconductor substrate, an interlayer dielectric layer on the semiconductor substrate, multiple trenches extending through the interlayer dielectric layer to the semiconductor substrate and including a first trench of a first NMOS device and a second trench of a second NMOS device, and a dielectric layer on sidewalls and a bottom of the trenches, forming an NMOS work function adjustment layer on the dielectric layer, performing a first oxidation treatment on the NMOS work function adjustment layer in the first trench to form a first oxide layer, and a second oxidation treatment on the NMOS work function adjustment layer in the second trench to form a second oxide layer, and forming a metal electrode layer in the trenches. The first oxide layer has an oxygen content lower than that of the second oxide layer.
    Type: Application
    Filed: March 13, 2018
    Publication date: September 20, 2018
    Inventors: JIAQI YANG, JIE ZHAO
  • Publication number: 20180269113
    Abstract: A method of manufacturing a semiconductor device includes providing a substrate structure including a semiconductor substrate, an interlayer dielectric layer on the semiconductor substrate, multiple trenches extending through the interlayer dielectric layer to the semiconductor substrate and having a first trench of a PMOS device and a second trench of an NMOS device, and a high-k dielectric layer on sidewalls and a bottom of the trenches. The method also includes forming a semiconductor layer filling the trenches, removing the semiconductor layer in the first trench, forming a PMOS work function adjustment layer in the first trench and a metal electrode layer on the PMOS work function adjustment layer in the first trench, removing the semiconductor layer in the second trench, and forming an NMOS work function adjustment layer in the second trench and a metal electrode layer on the NMOS work function adjustment layer in the second trench.
    Type: Application
    Filed: February 12, 2018
    Publication date: September 20, 2018
    Inventors: JIAQI YANG, JIE ZHAO
  • Patent number: 10012749
    Abstract: Techniques involve obtaining acoustic data from an acoustic logging tool, where the acoustic data includes waves reflected from the casing, the annular fill material, the formation, and/or interfaces between any of the casing, the annular fill material, and the formation. A crude casing thickness, tool position (e.g., eccentering), mud sound velocity may be estimated using the acoustic data.
    Type: Grant
    Filed: October 20, 2015
    Date of Patent: July 3, 2018
    Assignee: SCHLUMBERGER TECHNOLOGY CORPORATION
    Inventors: Sandip Bose, Smaine Zeroug, Jiaqi Yang
  • Patent number: 9991002
    Abstract: The present disclosure provides a memory. The memory includes an array of memory cells arranged as a plurality of rows by a plurality of columns. A memory cell is connected to at least one redundant memory cell in series in a same row for storing same data as the memory cell; and a column of memory cells correspond to at least one redundant column of redundant memory cells wherein each redundant memory cell in the at least one redundant column stores same data as the memory cell in a same row.
    Type: Grant
    Filed: April 20, 2017
    Date of Patent: June 5, 2018
    Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
    Inventors: Chen-Yi Huang, Jiaqi Yang, Cheng-Tai Huang
  • Patent number: 9991003
    Abstract: The present disclosure provides a memory. The memory includes an array of memory cells arranged as a plurality of rows by a plurality of columns. A memory cell is connected to at least one redundant memory cell in series in a same row for storing same data as the memory cell; and a column of memory cells correspond to at least one redundant column of redundant memory cells wherein each redundant memory cell in the at least one redundant column stores same data as the memory cell in a same row.
    Type: Grant
    Filed: April 20, 2017
    Date of Patent: June 5, 2018
    Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
    Inventors: Chen-Yi Huang, Jiaqi Yang, Cheng-Tai Huang