Patents by Inventor Jia Sheng Huang
Jia Sheng Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10678317Abstract: A power supply control device, applied for an electronic device is disclosed. The electronic device includes a case, wherein a user holds the case to operate the electronic device. The power supply control device includes a sensing module, including a first sensing component for sensing whether the user is touching a first sensing area of the case to generate a first determination signal; and a second sensing component for sensing whether the user is touching a second sensing area of the case to generate a second determination signal; and a power supply module, including a first relay, for connecting or disconnecting a system power end of the electronic device from a power supply terminal according to the first determination signal; and a second relay, for connecting or disconnecting a system ground end of the electronic device from a ground terminal according to the second determination signal.Type: GrantFiled: August 2, 2018Date of Patent: June 9, 2020Assignee: Wistron CorporationInventors: Mei-Ling Shang, Wei Liang Liao, Kai-Cheng Lee, Ke Yang, Jia Sheng Huang, Hua Yue Li
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Patent number: 10642334Abstract: A computer device includes a microprocessor, a voltage converter circuit converting a first voltage of a system power into a second voltage, a control circuit controlling supply of the second voltage and a detection circuit detecting whether power abnormality at the peripheral device has occurred. When confirming that the system power is being supplied normally, the microprocessor generates a first enable signal to enable the voltage converter circuit. When confirming that the voltage converter circuit functions normally, the microprocessor generates a second enable signal to enable the detection circuit. The detection circuit generates a first detection signal according to detection result for the microprocessor to determine whether to supply the second voltage to the peripheral device. When the first detection signal indicates that power abnormality has not occurred, the microprocessor generates a third enable signal to enable the control circuit to supply the second voltage to the peripheral device.Type: GrantFiled: April 3, 2018Date of Patent: May 5, 2020Assignee: WISTRON CORP.Inventors: Ke Yang, Kai Cheng Lee, Jia Sheng Huang, Mei Ling Shang, Wei Liang Liao
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Publication number: 20190369690Abstract: A power supply control device, applied for an electronic device is disclosed. The electronic device includes a case, wherein a user holds the case to operate the electronic device. The power supply control device includes a sensing module, including a first sensing component for sensing whether the user is touching a first sensing area of the case to generate a first determination signal; and a second sensing component for sensing whether the user is touching a second sensing area of the case to generate a second determination signal; and a power supply module, including a first relay, for connecting or disconnecting a system power end of the electronic device from a power supply terminal according to the first determination signal; and a second relay, for connecting or disconnecting a system ground end of the electronic device from a ground terminal according to the second determination signal.Type: ApplicationFiled: August 2, 2018Publication date: December 5, 2019Inventors: MEI-LING SHANG, WEI LIANG LIAO, Kai-Cheng Lee, KE YANG, JIA SHENG HUANG, Hua Yue LI
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Publication number: 20190146571Abstract: A computer device includes a microprocessor, a voltage converter circuit converting a first voltage of a system power into a second voltage, a control circuit controlling supply of the second voltage and a detection circuit detecting whether power abnormality at the peripheral device has occurred. When confirming that the system power is being supplied normally, the microprocessor generates a first enable signal to enable the voltage converter circuit. When confirming that the voltage converter circuit functions normally, the microprocessor generates a second enable signal to enable the detection circuit. The detection circuit generates a first detection signal according to detection result for the microprocessor to determine whether to supply the second voltage to the peripheral device. When the first detection signal indicates that power abnormality has not occurred, the microprocessor generates a third enable signal to enable the control circuit to supply the second voltage to the peripheral device.Type: ApplicationFiled: April 3, 2018Publication date: May 16, 2019Inventors: Ke YANG, Kai Cheng LEE, Jia Sheng HUANG, Mei Ling SHANG, Wei Liang LIAO
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Publication number: 20150263484Abstract: A hybrid silicon/III-V compound semiconductor laser device comprising a silicon substrate including a channel configured for silicide line formation as a function of current through the channel; so that the temperature of the laser device is adjusted to a predetermined level.Type: ApplicationFiled: May 19, 2014Publication date: September 17, 2015Applicant: Emcore CorporationInventor: Jia-Sheng Huang
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Publication number: 20150187748Abstract: A semiconductor device or an integrated circuit formed on a substrate with shunt disposed on the substrate in parallel with the device or circuit and designed to form a closed circuit or discharge path when the device is subjected to an electrostatic discharge pulse.Type: ApplicationFiled: January 2, 2014Publication date: July 2, 2015Applicant: Emcore CorporationInventor: Jia-Sheng Huang
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Patent number: 9014227Abstract: A method of fabricating a semiconductor laser device by forming a semiconductor structure at least part of which is in the form of a mesa structure having a flat top. The steps include depositing a passivation layer over the mesa structure, forming a contact opening in the passivation layer on the flat top of the mesa structure; and depositing a metal contact portion, with the deposited metal contact portion contacting the semiconductor structure via the contact opening. The contact opening formed through the passivation layer has a smaller area than the flat top of the mesa structure to allow for wider tolerances in alignment accuracy. The metal contact portion comprises a platinum layer between one or more gold layers to provide an effective barrier against Au diffusion into the semiconductor material.Type: GrantFiled: December 9, 2013Date of Patent: April 21, 2015Assignee: Emcore CorporationInventors: Jia-Sheng Huang, Phong Thai
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Publication number: 20140092930Abstract: A method of fabricating a semiconductor laser device by forming a semiconductor structure at least part of which is in the form of a mesa structure having a flat top. The steps include depositing a passivation layer over the mesa structure, forming a contact opening in the passivation layer on the flat top of the mesa structure; and depositing a metal contact portion, with the deposited metal contact portion contacting the semiconductor structure via the contact opening. The contact opening formed through the passivation layer has a smaller area than the flat top of the mesa structure to allow for wider tolerances in alignment accuracy. The metal contact portion comprises a platinum layer between one or more gold layers to provide an effective barrier against Au diffusion into the semiconductor material.Type: ApplicationFiled: December 9, 2013Publication date: April 3, 2014Applicant: Emcore CorporationInventors: Jia-Sheng Huang, Phong Thai
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Patent number: 8628988Abstract: A method of fabricating a semiconductor laser device by forming a semiconductor structure at least part of which is in the form of a mesa structure having a flat top. The steps include depositing a passivation layer over the mesa structure, forming a contact opening in the passivation layer on the flat top of the mesa structure; and depositing a metal contact portion, with the deposited metal contact portion contacting the semiconductor structure via the contact opening. The contact opening formed through the passivation layer has a smaller area than the flat top of the mesa structure to allow for wider tolerances in alignment accuracy. The metal contact portion comprises a platinum layer between one or more gold layers to provide an effective barrier against Au diffusion into the semiconductor material.Type: GrantFiled: December 21, 2011Date of Patent: January 14, 2014Assignee: Emcore CorporationInventors: Jia-Sheng Huang, Phong Thai
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Publication number: 20130163631Abstract: A method of fabricating a semiconductor laser device by forming a semiconductor structure at least part of which is in the form of a mesa structure having a flat top. The steps include depositing a passivation layer over the mesa structure, forming a contact opening in the passivation layer on the flat top of the mesa structure; and depositing a metal contact portion, with the deposited metal contact portion contacting the semiconductor structure via the contact opening. The contact opening formed through the passivation layer has a smaller area than the flat top of the mesa structure to allow for wider tolerances in alignment accuracy. The metal contact portion comprises a platinum layer between one or more gold layers to provide an effective barrier against Au diffusion into the semiconductor material.Type: ApplicationFiled: December 21, 2011Publication date: June 27, 2013Applicant: Emcore CorporationInventors: Jia-Sheng Huang, Phong Thai
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Patent number: 6365503Abstract: The present invention provides a method of forming an electromigration resisting layer in a semiconductor device. In an exemplary embodiment, the method comprises depositing a corrosion inhibitor comprising an organic ligand on a conductive layer of a semiconductor device wherein the conductive layer is susceptible to electromigration. The method further includes subjecting the corrosion inhibitor and the semiconductor device to a high temperature anneal to form an electromigration resisting layer on the conductive layer that reduces electromigration of the conductive layer.Type: GrantFiled: June 14, 2000Date of Patent: April 2, 2002Assignee: Agere Systems Guardian Corp.Inventors: Jia Sheng Huang, Seung H. Kang, Anthony S. Oates, Yaw S. Obeng
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Patent number: 5882953Abstract: Dopant activation in heavily boron doped p.sup.+ --Si is achieved by applying electric current of high density. The p.sup.+ --Si was implanted by a 40 KeV BF.sup.2+ at an ion intensity 5.multidot.10.sup.15 ions per cm.sup.2 and annealed at 900.degree. C. for 30 minutes to obtain a partial boron activation according to conventional processing steps. To obtain additional activation and higher conductivity, current was gradually applied according to the invention to a current density of approximately 5.times.10.sup.6 A/cm.sup.2 was realized. The resistance of the p.sup.+ --Si gradually increases and then decreases with a precipitous drop at a threshold current. The resistance was reduced by factor of 5 to 18 times and was irreversible if an activation current threshold was reached or exceeded. The high-current-density-dopant activation occurs at room temperature.Type: GrantFiled: July 12, 1996Date of Patent: March 16, 1999Assignee: The Regents of the University of CaliforniaInventors: King-Ning Tu, Jia-Sheng Huang