Abstract: The present disclosure provides a signal processing method, a storage medium, an integrated circuit, a device, and a terminal. The method is applied to perform interference detection and/or constant false alarm detection on signal units of a discrete signal to be detected, and includes: obtaining, for any signal unit, a signal statistical characteristic value of a respective discrete point in the signal unit; determining, based on the signal statistical characteristic value of the respective discrete point, a detection threshold for the signal unit; and, based on the detection threshold, performing constant false alarm detection, and/or, determining whether the respective discrete point is subject to interference.

Abstract: A transmission line phase shifter, a system, a chip, and a radar sensor are provided. The transmission line phase shifter includes at least one transmission line phase-shifting unit. A respective transmission line phase-shifting unit includes a first pair of differential transmission lines, a second pair of differential transmission lines, and a phase adjusting circuit. The phase adjusting circuit is configured to adjust electrical parameters of a transmission path where at least one pair of transmission lines of the first pair of differential transmission lines and the second pair of differential transmission lines is located according to at least one phase shifting control signal received, so as to enable that a RF signal output from the respective transmission line phase-shifting unit has a phase shift of a first phase or a second phase relative to an input RF signal of the respective transmission line phase-shifting unit.

Abstract: A transmission line phase shifter, a chip, and a radar sensor are provided. The transmission line phase shifter includes at least one transmission line phase-shifting unit. At a calibration stage, a preset number of transmission line phase-shifting units are configured to be in a state of a first phase or in a state of a second phase and configured to output an output RF signal, such that phase calibration information of each transmission line phase-shifting unit is determinable. At an operation stage, the phase adjusting circuit of the respective transmission line phase-shifting unit is configured to receive a corresponding phase shifting control signal and to adjust the respective transmission line phase-shifting unit, to enable the respective transmission line phase-shifting unit to shift a phase of an input RF signal by a calibrated first phase or a calibrated second phase.

Abstract: A phase shifting system, a chip, and a radar sensor are provided. A respective transmission line phase-shifting unit is configured to receive at least one phase shifting control signal and to shift a phase of a RF signal by a first phase or a second phase. Each transmission line phase-shifting unit includes a first group of transmission lines and a second group of transmission lines. At least some transmission lines in the first group of transmission lines of each transmission line phase-shifting unit are physically isolated from at least some transmission lines in the first group of transmission lines of an adjacent transmission line phase-shifting unit and transmission lines of the second group of transmission lines of each transmission line phase-shifting unit are coupled to respective transmission lines of the second group of transmission lines of an adjacent transmission line phase-shifting unit.

Abstract: A radio frequency (RF) inverter, a transmission line phase shifter, a system, a chip, and a radar sensor are provided. The RF inverter includes an inductance circuit and a first phase adjusting circuit that both are arranged symmetrically along a same symmetry axis. The inductance circuit includes a single-ended signal interface and a differential signal interface. The first phase adjusting circuit includes two controlled switches, and each controlled switch is connected between the ground wire and a corresponding ground terminal of a pair of ground terminals in the single-ended signal interface, to enable the inductance circuit to perform in-phase or inverting phase shifting on a received RF signal.

Abstract: A modular assembly for opto-electronic systems has a substrate on which various photonic integrated circuit (PIC) chips and electronic integrated circuit (EIC) chips are mounted. One or more waveguide (WG) chips mounted on the substrate align the optical communication between the PIC chips and fiber blocks for optical fibers. Preconfigured electrical connections in the substrate allow the PIC and EIC chips to communicate with one another and to communicate with solder bumps on the substrate for integration of the modular assembly with other electronic components.

Abstract: A modular assembly for opto-electronic systems has a substrate on which various photonic integrated circuit (PIC) chips and electronic integrated circuit (EIC) chips are mounted. One or more waveguide (WG) chips mounted on the substrate align the optical communication between the PIC chips and fiber blocks for optical fibers. Preconfigured electrical connections in the substrate allow the PIC and EIC chips to communicate with one another and to communicate with solder bumps on the substrate for integration of the modular assembly with other electronic components.

Abstract: A photonic integrated circuit (PIC) device has photonic devices arranged in an array with respect to control and common conductors. Each of the photonic devices has a photonic component (e.g., photodiode, thermo-optic phase shifter, etc.) and a switching diode connected in series with one another between a control connection and a common connection. The photonic component has at least one optical port, which can be coupled to a waveguide in the PIC device. The switching diode is configured to switch between reverse and forward bias in response to the electrical signals. In this way, control circuitry for providing control and monitoring signals to the conductors can be greatly simplified, and the PIC device can be more compact.

Abstract: A modular assembly for opto-electronic systems has a substrate on which various photonic integrated circuit (PIC) chips and electronic integrated circuit (EIC) chips are mounted. One or more waveguide (WG) chips mounted on the substrate align the optical communication between the PIC chips and fiber blocks for optical fibers. Preconfigured electrical connections in the substrate allow the PIC and EIC chips to communicate with one another and to communicate with solder bumps on the substrate for integration of the modular assembly with other electronic components.

Abstract: A modular assembly for opto-electronic systems has a substrate on which various photonic integrated circuit (PIC) chips and electronic integrated circuit (EIC) chips are mounted. One or more waveguide (WG) chips mounted on the substrate align the optical communication between the PIC chips and fiber blocks for optical fibers. Preconfigured electrical connections in the substrate allow the PIC and EIC chips to communicate with one another and to communicate with solder bumps on the substrate for integration of the modular assembly with other electronic components.

Abstract: A modular assembly for opto-electronic systems has a substrate on which various photonic integrated circuit (PIC) chips and electronic integrated circuit (EIC) chips are mounted. One or more waveguide (WG) chips mounted on the substrate align the optical communication between the PIC chips and fiber blocks for optical fibers. Preconfigured electrical connections in the substrate allow the PIC and EIC chips to communicate with one another and to communicate with solder bumps on the substrate for integration of the modular assembly with other electronic components.

Abstract: A radar system and control method thereof is disclosed. The radar system comprises a plurality of radar units, each comprising: one or more radio frequency (RF) channels configured to receive a reflected signal and then generate an analog input signal according to the reflected signal; and a processing module connected with all the RF channels and configured to sample the analog input signal to obtain a digital signal and perform the first digital signal processing on the digital signal to obtain intermediate data, wherein when the plurality of radar units work jointly, a designated radar unit performs the second digital signal processing on the plurality of intermediate data provided by the plurality of radar units, thereby obtaining result data of the radar system.

Abstract: An optical coupling system includes a first waveguide that includes a first waveguide end, a second waveguide end. The optical coupling system includes a first lens that is aligned with a first optical fiber. The optical coupling system includes a first lens holder that retains the first lens. The lens holder includes a waveguide retention portion on which the first waveguide end is positioned such that the first waveguide end is aligned with the first lens. The optical coupling system includes a second lens that is aligned with a first optical component. The optical coupling system includes a second lens holder that retains the second lens. The second lens holder includes a waveguide retention portion on which the second waveguide end is positioned such that the second waveguide end is aligned with the second lens.

Abstract: An optical coupling assembly includes optical fibers and a fiber coupling structure assembly that includes an active optical component (AOC) array. The AOC array includes wafer material, AOCs, and soldering pads. The fiber coupling structure assembly includes a rigid substrate that defines apertures and includes an array connection surface on which additional soldering pads are formed. The rigid substrate is fixed to the AOC array by bump joints that connect the soldering pads of the AOC array with the additional soldering pads formed on the array connection surface such that each of the apertures is aligned with a corresponding one of the AOCs. The optical fibers may be positioned relative to the one or more apertures such that an optical signal may be communicated between a corresponding one of the optical fibers and a corresponding one of the AOCs via a corresponding one of the one or more apertures.

Abstract: An optical coupling system includes a first waveguide that includes a first waveguide end, a second waveguide end. The optical coupling system includes a first lens that is aligned with a first optical fiber. The optical coupling system includes a first lens holder that retains the first lens. The lens holder includes a waveguide retention portion on which the first waveguide end is positioned such that the first waveguide end is aligned with the first lens. The optical coupling system includes a second lens that is aligned with a first optical component. The optical coupling system includes a second lens holder that retains the second lens. The second lens holder includes a waveguide retention portion on which the second waveguide end is positioned such that the second waveguide end is aligned with the second lens.

Abstract: An optical coupling assembly includes optical fibers and a fiber coupling structure assembly that includes an active optical component (AOC) array. The AOC array includes wafer material, AOCs, and soldering pads. The fiber coupling structure assembly includes a rigid substrate that defines apertures and includes an array connection surface on which additional soldering pads are formed. The rigid substrate is fixed to the AOC array by bump joints that connect the soldering pads of the AOC array with the additional soldering pads formed on the array connection surface such that each of the apertures is aligned with a corresponding one of the AOCs. The optical fibers may be positioned relative to the one or more apertures such that an optical signal may be communicated between a corresponding one of the optical fibers and a corresponding one of the AOCs via a corresponding one of the one or more apertures.

Abstract: A guide pin wafer may include a base wafer that includes multiple dies. Each die may include a corresponding lens cutout. The guide pin wafer may also include multiple guide pins mounted on the base wafer. Each die of the base wafer may be mounted with two or more corresponding guide pins that may be configured to engage a parallel fiber connector to the corresponding die.

Abstract: A guide pin wafer may include a base wafer that includes multiple dies. Each die may include a corresponding lens cutout. The guide pin wafer may also include multiple guide pins mounted on the base wafer. Each die of the base wafer may be mounted with two or more corresponding guide pins that may be configured to engage a parallel fiber connector to the corresponding die.

Abstract: Herein is presented, a low power on-die 60 GHz distribution network for a beamforming system that can be scaled as the number of transmitters increases. The transmission line based power splitters and quadrature hybrids whose size would be proportional to a quarter wavelength (˜600 ?m) if formed using transmission lines are instead constructed by inductors/capacitors and reduce the area by more than 80%. An input in-phase I clock and an input quadrature Q clock are combined into a single composite clock waveform locking the phase relation between the in-phase I clock and quadrature Q clock. The composite clock is transferred over a single transmission line formed using a Co-planar Waveguide (CPW) coupling the source and destination locations over the surface of a die. Once the individuals the in-phase I and quadrature Q clocks are required, they can be generated at the destination from the composite clock waveform.

Abstract: The class-E amplifier can be tuned to pass only the fundamental frequency to the antenna by optimizing the second harmonics at the drain of the final PA driver transistor. A CPW in series with a capacitor between the PA transistor and the load forms a band pass filter that only allows the fundamental frequency to pass to the load of the antenna. A supply inductor to couple the drain of the final PA driver transistor to the power supply is tuned at the second harmonic with the parasitic capacitance of the drain of the PA transistor. A load capacitance is adjusted at the fundamental frequency to insure that the current waveform and voltage waveforms at the drain of the PA driver transistor do not overlap, thereby minimizing the parasitic power dissipation and allowing maximum energy to be applied to the antenna.