Patents by Inventor JIAWEI LYU

JIAWEI LYU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor testkey pattern and test method thereof
    Patent number: 11721599
    Abstract: The invention provides a semiconductor testkey pattern, the semiconductor testkey pattern includes a high density device region and a plurality of resistor pairs surrounding the high density device region, wherein each resistor pair includes two mutually symmetrical resistor patterns.
    Type: Grant
    Filed: March 30, 2021
    Date of Patent: August 8, 2023
    Assignee: United Semiconductor (Xiamen) Co., Ltd.
    Inventors: Linshan Yuan, Guang Yang, Jinjian Ouyang, Jiawei Lyu, Chin-Chun Huang, Wen Yi Tan
  • Semiconductor testkey pattern and test method thereof
    Publication number: 20220285235
    Abstract: The invention provides a semiconductor testkey pattern, the semiconductor testkey pattern includes a high density device region and a plurality of resistor pairs surrounding the high density device region, wherein each resistor pair includes two mutually symmetrical resistor patterns.
    Type: Application
    Filed: March 30, 2021
    Publication date: September 8, 2022
    Inventors: LINSHAN YUAN, Guang Yang, JINJIAN OUYANG, JIAWEI LYU, Chin-Chun Huang, WEN YI TAN
  • Semiconductor memory device
    Patent number: 10985168
    Abstract: A semiconductor memory device includes a substrate, at least one floating gate electrode, an interlayer dielectric layer, an interconnection structure, an etching stop layer, a conductive structure, and an opening. The floating gate electrode is disposed on the substrate. The interlayer dielectric layer is disposed on the floating gate electrode. The interconnection structure is disposed in the interlayer dielectric layer. The etching stop layer is disposed on the interlayer dielectric layer. The conductive structure penetrates the etching stop layer and is electrically connected with the interconnection structure. The opening penetrates the etching stop layer and overlaps at least a part of the floating gate electrode in a thickness direction of the substrate.
    Type: Grant
    Filed: October 1, 2019
    Date of Patent: April 20, 2021
    Assignee: United Semiconductor (Xiamen) Co., Ltd.
    Inventors: Jung-Chun Yen, Chien-Chih Wang, Guang Yang, Jiawei Lyu, Linshan Yuan, Wen Yi Tan
  • SEMICONDUCTOR MEMORY DEVICE
    Publication number: 20210066322
    Abstract: A semiconductor memory device includes a substrate, at least one floating gate electrode, an interlayer dielectric layer, an interconnection structure, an etching stop layer, a conductive structure, and an opening. The floating gate electrode is disposed on the substrate. The interlayer dielectric layer is disposed on the floating gate electrode. The interconnection structure is disposed in the interlayer dielectric layer. The etching stop layer is disposed on the interlayer dielectric layer. The conductive structure penetrates the etching stop layer and is electrically connected with the interconnection structure. The opening penetrates the etching stop layer and overlaps at least a part of the floating gate electrode in a thickness direction of the substrate.
    Type: Application
    Filed: October 1, 2019
    Publication date: March 4, 2021
    Inventors: Jung-Chun Yen, Chien-Chih Wang, Guang Yang, JIAWEI LYU, LINSHAN YUAN, WEN YI TAN