Patents by Inventor Jia-Wei Wu

Jia-Wei Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240165170
    Abstract: The present invention provides a method for preventing and/or treating a NSAID-induced gastric ulcer. The method comprises administrating an effective amount of a lactic acid bacterium set to a subject. The lactic acid bacterium set comprises Lactobacillus plantarum GKD7 and Pediococcus acidilactici GKA4.
    Type: Application
    Filed: March 6, 2023
    Publication date: May 23, 2024
    Applicant: GRAPE KING BIO LTD.
    Inventors: Chin-Chu CHEN, Yen-Lien CHEN, Shin-Wei LIN, You-Shan TSAI, Ci-Sian WANG, Yu-Hsin HOU, Yang-Tzu SHIH, Ching-Wen LIN, Ya-Jyun CHEN, Jia-Lin JIANG, Zi-He WU, Yen-Po CHEN, Tzu Chun LIN
  • Patent number: 11989005
    Abstract: A system performs adaptive thermal ceiling control at runtime. The system includes computing circuits and a thermal management module. When detecting a runtime condition change that affects power consumption in the system, the thermal management module determines an adjustment to the thermal ceiling of a computing circuit, and increases the thermal ceiling of the computing circuit according to the adjustment.
    Type: Grant
    Filed: September 30, 2021
    Date of Patent: May 21, 2024
    Assignee: MediaTek Inc.
    Inventors: Bo-Jr Huang, Jia-Wei Fang, Jia-Ming Chen, Ya-Ting Chang, Chien-Yuan Lai, Cheng-Yuh Wu, Yi-Pin Lin, Wen-Wen Hsieh, Min-Shu Wang
  • Patent number: 11978802
    Abstract: Provided are FinFET devices and methods of forming the same. A dummy gate having gate spacers on opposing sidewalls thereof is formed over a substrate. A dielectric layer is formed around the dummy gate. An upper portion of the dummy gate is removed and upper portions of the gate spacers are removed, so as to form a first opening in the dielectric layer. A lower portion of the dummy gate is removed to form a second opening below the first opening. A metal layer is formed in the first and second openings. The metal layer is partially removed to form a metal gate.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: May 7, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Wei Hsu, Chih-Hao Wang, Huan-Chieh Su, Wei-Hao Wu, Zhi-Chang Lin, Jia-Ni Yu
  • Publication number: 20240139262
    Abstract: The present disclosure relates to a complex probiotic composition and a method for improving exercise performance of a subject with low intrinsic aerobic exercise capacity. The complex probiotic composition, which includes Lactobacillus rhamnosus GKLC1, Bifidobacterium lactis GKK24 and Clostridium butyricum GKB7, administered to the subject with the low intrinsic aerobic exercise capacity in a continuation period, can effectively reduce serum lactic acid and serum urea nitrogen after aerobic exercise, reduce proportion of offal fat and/or increase liver and muscle glycogen contents, thereby being as an effective ingredient for preparation of various compositions.
    Type: Application
    Filed: October 13, 2023
    Publication date: May 2, 2024
    Inventors: Chin-Chu CHEN, Yen-Lien CHEN, Shih-Wei LIN, Yen-Po CHEN, Ci-Sian WANG, Yu-Hsin HOU, Yang-Tzu SHIH, Ching-Wen LIN, Ya-Jyun CHEN, Jia-Lin JIANG, You-Shan TSAI, Zi-He WU
  • Publication number: 20240113615
    Abstract: A Totem Pole PFC circuit includes at least one fast-switching leg, a slow-switching leg, and a control unit. Each fast-switching leg includes a fast-switching upper switch and a fast-switching lower switch. The slow-switching leg is coupled in parallel to the at least one fast-switching leg, and the slow-switching leg includes a slow-switching upper switch and a slow-switching lower switch. The control unit receives an AC voltage with a phase angle, and the control unit includes a current detection loop, a voltage detection loop, and a control loop. The control loop generates a second control signal assembly to respectively control the slow-switching upper switch and the slow-switching lower switch. The control loop controls the second control signal assembly to follow the phase angle, and dynamically adjusts a duty cycle of the second control signal assembly to turn on or turn off the slow-switching upper switch and the slow-switching lower switch.
    Type: Application
    Filed: February 22, 2023
    Publication date: April 4, 2024
    Inventors: Chun-Hao HUANG, Chun-Wei LIN, I-Hsiang SHIH, Ching-Nan WU, Jia-Wei YEH
  • Publication number: 20240046402
    Abstract: An image processing circuit includes a first buffer circuit, a first selector circuit, a processor circuit, a second buffer circuit, and an assigning circuit. The first buffer circuit receives pixels in a sliding window of an image. The first selector circuit outputs the pixels according to a mode signal. The processor circuit performs a first filtering process on the pixels to generate first processed pixels. The assigning circuit transmits the first processed pixels to a back-end circuit or transmits the first processed pixels to the second buffer circuit. When the assigning circuit transmits the first processed pixels to the second buffer circuit, the first selector circuit transm its the first processed pixels to the processor circuit, the processor circuit performs a second filtering process on the first processed pixels to generate second processed pixels, and the assigning circuit transmits the second processed pixels to the back-end circuit.
    Type: Application
    Filed: February 6, 2023
    Publication date: February 8, 2024
    Inventors: Kung Ho LEE, Yu Cheng CHENG, Jia Wei WU
  • Publication number: 20230186442
    Abstract: An image processing method includes following operations: generating, by a processor, a sliding window for a target pixel in a plurality of pixels in image data; generating, by the processor, an original brightness histogram of the sliding window according to an original bit depth; generating, by the processor, a low-bit-depth brightness histogram of the sliding window according to a low bit depth; determining, by the processor, a target low-bit-depth range from the low-bit-depth brightness histogram according to the target pixel; extracting, by the processor, a partial original brightness histogram from the original brightness histogram according to the target low-bit-depth range; and performing, by the processor, a histogram equalization process on the partial original brightness histogram according to the original bit depth to generate a final brightness value of the target pixel.
    Type: Application
    Filed: May 18, 2022
    Publication date: June 15, 2023
    Inventors: Kung Ho LEE, Yu Cheng CHENG, Jia Wei WU
  • Publication number: 20190229173
    Abstract: A light emitting device includes a transistor and the transistor has a gate layer, and a dielectric under the gate layer. The light emitting device also includes a capacitor coupled to the transistor The capacitor including a first electrode, a second electrode over the first electrode, and a dielectric between the first and second electrode. The tight emitting device further includes a contact dielectric seprataing the transistor and the capacitor. The dielectric fully surrounds the capacitor and the transistor, wherein the contact dielectric is nitrogen free.
    Type: Application
    Filed: January 23, 2018
    Publication date: July 25, 2019
    Inventors: CHUN-HSIUNG WANG, CHENG-HSIN CHEN, JIA-WEI WU
  • Patent number: 9137661
    Abstract: An authentication method for user equipment (UE) and LIPA network entities is applicable to a cross-LIPA communication environment having an UE end, a visiting LIPA network entity end (LIPAV), and a home LIPA network entity end (LIPAH). The UE end successfully registers to a core network (CN) via the LIPAV, thereby attaining mutual trust relationship between the UE end and the LIPAV. The UE end successfully registers to the CN via the LIPAH, thereby attaining mutual trust relationship between the UE end and the LIPAH. The LIPAH requests the UE end via the LIPAV for successfully re-authenticating the CN, thereby attaining mutual trust relationship between the LIPAV and the LIPAH.
    Type: Grant
    Filed: July 3, 2012
    Date of Patent: September 15, 2015
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Ching-Wen Cheng, Yung-Chun Lin, Jia-Wei Wu, Shun-Ren Yang
  • Publication number: 20130091552
    Abstract: An authentication method for user equipment (UE) and LIPA network entities is applicable to a cross-LIPA communication environment having an UE end, a visiting LIPA network entity end (LIPAV), and a home LIPA network entity end (LIPAH). The UE end successfully registers to a core network (CN) via the LIPAV, thereby attaining mutual trust relationship between the UE end and the LIPAV. The UE end successfully registers to the CN via the LIPAH, thereby attaining mutual trust relationship between the UE end and the LIPAH. The LIPAH requests the UE end via the LIPAV for successfully re-authenticating the CN, thereby attaining mutual trust relationship between the LIPAV and the LIPAH.
    Type: Application
    Filed: July 3, 2012
    Publication date: April 11, 2013
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Ching-Wen Cheng, Yung-Chun Lin, Jia-Wei Wu, Shun-Ren Yang