Abstract: The present application provides a display panel and a display device, the display panel includes a light extraction layer and a cover layer, wherein the light extraction layer is located on a side of the cover layer close to a pixel definition layer, a light modulation structure includes a plurality of light extraction units, each of the light extraction units includes a first sub-unit and a second sub-unit, wherein the light extraction layer includes a light extraction opening and the first sub-unit, the second sub-unit is located in the cover layer, and a refractive index of the first sub-unit is smaller than a refractive index of the second sub-unit.

Abstract: A pixel driving circuit and a display apparatus. The pixel driving circuit includes a pulse amplitude modulation circuit and a pulse width modulation circuit electrically connected to each other. The pulse amplitude modulation circuit is electrically connected to a light-emitting element to provide a drive current thereto and is configured to control an amplitude of the drive current. The pulse width modulation circuit is configured to control a pulse width of the drive current. The pulse amplitude modulation circuit includes a light-emitting branch connected to the light-emitting element, which includes a first driving transistor and at least one switching transistor. The at least one transistor is a double-gate double-channel transistor.

Abstract: A display panel and a formation method thereof, and a display apparatus are provided in the present disclosure. The method includes providing a base substrate; forming an array layer on a side of the base substrate; forming a light-emitting structure layer on a side of the array layer away from the base substrate, where the light-emitting structure layer includes a plurality of light-emitting units; and forming a light-blocking layer on a side of the light-emitting structure layer away from the base substrate, where the light-blocking layer includes a black matrix and openings. Before forming the openings, the method further includes forming a first inorganic layer between the light-emitting structure layer and the light-blocking layer, where the first inorganic layer at least includes first sub-portions; and a vertical projection of a first sub-portion on the base substrate overlaps a vertical projection of a corresponding opening on the base substrate.

Abstract: A display panel and a display device are provided. The display panel includes a substrate, a driving circuit, and a first light blocking layer. The driving circuit includes an oxide transistor and a silicon transistor disposed at the substrate. The oxide transistor includes a first active layer. An orthographic projection of the first light blocking layer on the substrate at least overlaps an orthographic projection of the first active layer on the substrate.

Abstract: Provided are display panels and display apparatus. The display panel includes a driving array layer including a pixel circuit and a driving circuit configured to provide a control signal to the pixel circuit. The pixel circuit includes first and third transistors. The driving circuit includes second and fourth transistors. The first to fourth transistors include an active layer including silicon, an active layer including oxide semiconductor, an active layer including oxide semiconductor, and an active layer including silicon. The first and the third transistors are switching transistors of the pixel circuit, |W1/L1-W4/L4|<|W2/L2-W3/L3|; or the first and the third transistors are a driving transistor and a switching transistor of the pixel circuit, respectively, |W1/L1-W4/L4|>5*|W2/L2-W3/L3|; or the first and third transistors are a switching transistor and a driving transistor of the pixel circuit, respectively, 5*|W1/L1-W4/L4|<|W2/L2-W3/L3|.

Abstract: The present application discloses a display panel and a display apparatus. The display panel includes a substrate, a first shielding layer and a driving circuit layer. The first shielding layer is located on a side of the substrate, and the first shielding layer includes a plurality of first shielding units located in a first display region and a plurality of second shielding units located in a second display region. At least a portion of adjacent first shielding units are connected through first connecting parts, and a portion of adjacent second shielding units are connected through second connecting parts. The driving circuit layer is located on a side of the first shielding layer away from the substrate, the driving circuit layer includes a plurality of driving circuits, and each driving circuit includes a driving transistor.

Abstract: An array substrate includes a substrate, a semiconductor layer over the substrate, a gate over a side of the semiconductor layer away from the substrate, and a source and a drain on sides of the gate. The semiconductor layer includes a channel region, a first doping region, and a first ohmic contact region, which are sequentially connected. A shielding layer is between the substrate and the semiconductor layer. The shielding layer is connected to a fixed potential, and the shielding layer at least partially overlaps with the first doping region in a direction perpendicular to a plane of the substrate.

Abstract: A display panel includes a pixel circuit and a light-emitting element. The pixel circuit includes a data-writing module, a driving module, and a compensation module. The driving module is configured to provide a driving current for the light-emitting element, wherein the driving module includes a driving transistor, and the driving transistor is an NMOS transistor. The data-writing module is configured to selectively provide a data signal for the driving module. The compensation module is configured to compensate a threshold voltage of the driving transistor. An operational process of the pixel circuit includes a bias stage. In the bias stage, the compensation module is turned off, the driving transistor receives a bias signal, and the bias signal is configured to adjust a bias state of the driving transistor.

Abstract: Provided are a display panel and a display device, where the display panel includes a first light-emitting unit and a first color-resist block which are correspondingly disposed, where the first color-resist block includes a first display color-resist block and a first imaging color-resist block, the first light-emitting unit includes a first boundary and a second boundary which are disposed opposite to each other, the first boundary is located on a side of the second boundary near the first imaging color-resist block, the first display color-resist block includes a first edge and a second edge which are disposed opposite to each other, the first edge is located on a side of the second edge near the first imaging color-resist block, and a maximum distance between the first boundary and the first edge is greater than a maximum distance between the second boundary and the second edge.

Abstract: Provided are a tiled display panel and a display device. The tiled display panel includes a transparent substrate and at least two display subpanels. The at least two display subpanels are disposed in at least two tiled regions of the transparent substrate respectively. A first alignment pattern on the transparent substrate includes at least two first sub-patterns. The at least two first sub-patterns are disposed in the at least two tiled regions respectively. A first sub-pattern includes a hollowed-out region. A second alignment pattern on a display subpanel includes at least two second sub-patterns. The shape of a second sub-pattern is the same as the shape of the hollowed-out region. The vertical projection of the second sub-pattern on the transparent substrate is located in the hollowed-out region.

Abstract: A display panel includes a pixel circuit and a light-emitting element. The pixel circuit includes a data-writing module, a driving module, and a compensation module. The driving module is configured to provide a driving current for the light-emitting element, wherein the driving module includes a driving transistor, and the driving transistor is an NMOS transistor. The data-writing module is configured to selectively provide a data signal for the driving module. The compensation module is configured to compensate a threshold voltage of the driving transistor. An operational process of the pixel circuit includes a bias stage. In the bias stage, the compensation module is turned off, the driving transistor receives a bias signal, and the bias signal is configured to adjust a bias state of the driving transistor.

Abstract: A display panel includes a pixel circuit and a light-emitting element. The pixel circuit includes an amplitude modulation subcircuit and a pulse width modulation subcircuit, and the amplitude modulation subcircuit and the pulse width modulation subcircuit each includes a drive transistor. A working process of at least one of the amplitude modulation subcircuit or the pulse width modulation subcircuit includes a bias stage. A bias adjustment signal is provided to the drive transistor during the bias stage, and the bias adjustment signal is configured to adjust the bias state of the drive transistor.

Abstract: Provided are display panels and display apparatus. The display panel includes a driving array layer including a pixel circuit and a driving circuit configured to provide a control signal to the pixel circuit. The pixel circuit includes first and third transistors. The driving circuit includes second and fourth transistors. The first to fourth transistors include an active layer including silicon, an active layer including oxide semiconductor, an active layer including oxide semiconductor, and an active layer including silicon. The first and the third transistors are switching transistors of the pixel circuit, |W1/L1-W4/L4|<|W2/L2-W3/L3|; or the first and the third transistors are a driving transistor and a switching transistor of the pixel circuit, respectively, |W1/L1-W4/L4|>5*|W2/L2-W3/L3|; or the first and third transistors are a switching transistor and a driving transistor of the pixel circuit, respectively, 5*|W1/L1-W4/L4|<|W2/L2-W3/L3|.

Abstract: Provided are display panels and display apparatus. The display panel includes a driving array layer including a pixel circuit and a driving circuit configured to provide a control signal to the pixel circuit. The pixel circuit includes a first capacitor and a first transistor including an active layer including silicon. The driving circuit includes a second capacitor and a second transistor including an active layer including oxide semiconductor. In a direction perpendicular to a plane of the display panel, the first capacitor partially overlaps the first transistor, and the second capacitor does not overlap the second transistor; or in a direction perpendicular to a plane of the display panel, an area of a region where the first capacitor overlaps the first transistor is greater than an area of a region where the second capacitor overlaps the second transistor.

Abstract: A display panel, a method for fabricating the display panel and a display device are provided to improve reliability of the display panel. The display panel includes an array layer, one or more light-emitting devices arranged on the array layer, a first film layer at least partially arranged on the one or more light-emitting devices, and a first electrode arranged on the first film layer. Openings are formed on the first film layer, and at least part of the openings overlap the respective light-emitting devices. The display device including the display panel and the method for fabricating the display panel are further provided.

Abstract: The present disclosure provides a display panel, including: a substrate; a pixel definition layer disposed on a side of the substrate, that the pixel definition layer includes an isolation structure and a pixel opening enclosed by the isolation structure; and a first lens layer disposed on a side of the pixel definition layer away from the substrate, that the first lens layer includes a first lens body and a lens opening enclosed by the first lens body, and in a thickness direction of the display panel, the first lens body at least overlaps the isolation structure, and the lens opening overlaps the pixel opening, that, an orthographic projection of the first lens body on the substrate is a lens projection, an orthographic projection of the pixel opening on the substrate is a pixel projection, and a distance between at least a portion of an edge of the lens projection and an edge of the pixel projection is substantially zero.

Abstract: A display panel includes a pixel circuit and a light-emitting element. The pixel circuit includes a data-writing module, a driving module, and a compensation module. The driving module is configured to provide a driving current for the light-emitting element, wherein the driving module includes a driving transistor, and the driving transistor is an NMOS transistor. The data-writing module is configured to selectively provide a data signal for the driving module. The compensation module is configured to compensate a threshold voltage of the driving transistor. An operational process of the pixel circuit includes a bias stage. In the bias stage, the compensation module is turned off, the driving transistor receives a bias signal, and the bias signal is configured to adjust a bias state of the driving transistor.

Abstract: Provided are display panels and display apparatus. The display panel includes a driving array layer including a pixel circuit and a driving circuit configured to provide a control signal to the pixel circuit. The pixel circuit includes first and third transistors. The driving circuit includes second and fourth transistors. The first to fourth transistors include an active layer including silicon, an active layer including oxide semiconductor, an active layer including oxide semiconductor, and an active layer including silicon. The first and the third transistors are switching transistors of the pixel circuit, |W1/L1-W4/L4|<|W2/L2-W3/L3|; or the first and the third transistors are a driving transistor and a switching transistor of the pixel circuit, respectively, |W1/L1-W4/L4|>5*|W2/L2-W3/L3|; or the first and third transistors are a switching transistor and a driving transistor of the pixel circuit, respectively, 5*|W1/L1-W4/L4|<|W2/L2-W3/L3|.

Abstract: Provided are display panels and display apparatus. The display panel includes a driving array layer including a pixel circuit and a driving circuit configured to provide a control signal to the pixel circuit. The pixel circuit includes a first capacitor and a first transistor including an active layer including silicon. The driving circuit includes a second capacitor and a second transistor including an active layer including oxide semiconductor. In a direction perpendicular to a plane of the display panel, the first capacitor partially overlaps the first transistor, and the second capacitor does not overlap the second transistor; or in a direction perpendicular to a plane of the display panel, an area of a region where the first capacitor overlaps the first transistor is greater than an area of a region where the second capacitor overlaps the second transistor.

Abstract: Provided are a display panel and a display apparatus. The display panel includes a driving array layer having functional layers and insulation layers. The driving array layer includes a first transistor, a second transistor, a first capacitor including a first plate and a second plate, and a second capacitor including a third plate and a fourth plate. An active layer of the first transistor contains silicon, and an active layer of the second transistor contains oxide semiconductor. The first plate and the second plate are located in two of the functional layers, respectively, and the third plate and the fourth plate are located in two of the functional layers, respectively.