Abstract: Methods for detecting defects on the surface of a sheet of material include collimating a beam of light and intersecting the collimated beam of light with a beam splitter. The beam splitter directs a first portion of the intersected beam of collimated light to illuminate a first surface of the sheet, wherein a first portion of the light illuminating the first surface is reflected and a second portion of the illuminating light is scattered by a defect. The reflected and scattered light is received with a first lens element that directs the reflected and scattered light to an inverse aperture. The reflected light is blocked by the inverse aperture and the scattered light is transmitted by the inverse aperture. The scattered light transmitted by the inverse aperture is directed with a second lens element to an imaging device.

Abstract: Method, system and computer program product are provided for estimating a circadian phase of a subject by: obtaining a sensed biological signal for the subject; and using, by one or more processors, adaptive frequency tracking to adaptively estimate the circadian phase of the subject from the sensed biological signal. Circadian phase estimation may be accelerated by providing a feedback loop for the adaptive frequency tracking, which utilizes, in part, a circadian phase model in automatically ascertaining a phase correction for the adaptive frequency tracking. The circadian phase estimation may be used in automatically constructing a light-based circadian rhythm model for the subject using a linear parameter-varying (LPV) formulation, and once constructed, the circadian rhythm model for the subject may be used to provide light-based circadian rhythm regulation.

Abstract: Method, system and computer program product are provided for estimating a circadian phase of a subject by: obtaining a sensed biological signal for the subject; and using, by one or more processors, adaptive frequency tracking to adaptively estimate the circadian phase of the subject from the sensed biological signal. Circadian phase estimation may be accelerated by providing a feedback loop for the adaptive frequency tracking, which utilizes, in part, a circadian phase model in automatically ascertaining a phase correction for the adaptive frequency tracking. The circadian phase estimation may be used in automatically constructing a light-based circadian rhythm model for the subject using a linear parameter-varying (LPV) formulation, and once constructed, the circadian rhythm model for the subject may be used to provide light-based circadian rhythm regulation.

Abstract: A display substrate, a manufacturing method thereof, and a display device are provided. The manufacturing method of the display substrate includes: forming a pattern of first transparent conductive layer, forming a passivation layer and forming a second transparent conductive layer on the passivation layer, forming a pattern of second transparent conductive layer, i.e., a slit electrode, the pattern of second transparent conductive layer including a plurality of sub-electrodes arranged at intervals and located in a display region of the display substrate; and removing a portion of the passivation layer which is in the display region and is not covered by the sub-electrodes, forming a pattern of passivation layer. The second transparent conductive layer is polycrystalline ITO.

Abstract: A poly-silicon thin film transistor and its manufacturing method, an array substrate and its manufacturing method, and a display device are provided. The method for manufacturing a poly-silicon thin film transistor includes forming a poly-silicon layer on a base substrate so that the poly-silicon layer includes a first poly-silicon area, second poly-silicon areas located at the both sides of the first poly-silicon area and third poly-silicon areas located at a side of the second poly-silicon areas away from the first poly-silicon area; forming a barrier layer between a gate electrode and a gate insulation layer by a dry etching method so that the barrier layer corresponds to the first poly-silicon area; and with the barrier layer as a mask doping the second poly-silicon areas to form lightly doped areas. By this method, the lightly doped areas may have the same length, and thus the problem of excessive leakage current is avoided.

Abstract: Methods for fabricating a thin film transistor and an array substrate, an array substrate and a display device are provided, and the fabrication method of a thin film transistor includes: forming a first photoresist pattern on the active layer film, wherein the first photoresist pattern comprises a photoresist area of a first thickness and a photoresist area in a second thickness; etching the active layer film by using the first photoresist pattern as a mask to form an active layer; ashing the first photoresist pattern to remove the photoresist area of the second thickness and to reduce a thickness of the photoresist area of the first thickness to form the second photoresist pattern. The second photoresist pattern is used as the mask to etch the source-drain electrode thin film.

Abstract: Disclosed are a TFT array substrate, a method for fabricating the same and a display device. The TFT array substrate includes a plurality of pixel units, each of the plurality of pixel units includes a common electrode (9). The common electrode (9), is comb-shaped, and includes a plurality of strip electrodes and a plurality of slits. Each of the strip electrodes is configured for reflecting light incident on the strip electrode, and each of the slits is configured for transmitting light incident on the slit. As the comb-shaped common electrode with both a reflective region and a transmissive region is formed through a single patterning process, the fabrication process is simplified and the fabrication cost and difficulty are reduced.

Abstract: The present invention provides a low-temperature polysilicon thin film transistor array substrate and a method of fabricating the same, and a display device. The array substrate comprises: a substrate; a polysilicon active layer provided on the substrate; a first insulation layer provided on the active layer; a plurality of gates and a gate line provided on the first insulation layer; a second insulation layer provided on the gates; a source, a drain, a data line and a pixel electrode electrically connected with the drain, which are provided on the second insulation layer, the source covers the plurality of gates. The plurality of gates are provided directly below the source, so that the leakage current is reduced and the aperture ratio of panel is improved.

Abstract: Methods for fabricating a thin film transistor and an array substrate, an array substrate and a display device are provided, and the fabrication method of a thin film transistor includes: forming a first photoresist pattern on the active layer film, wherein the first photoresist pattern comprises a photoresist area of a first thickness and a photoresist area in a second thickness; etching the active layer film by using the first photoresist pattern as a mask to form an active layer; ashing the first photoresist pattern to remove the photoresist area of the second thickness and to reduce a thickness of the photoresist area of the first thickness to form the second photoresist pattern. The second photoresist pattern is used as the mask to etch the source-drain electrode thin film.

Abstract: An array substrate, a manufacturing method thereof and a display device are disclosed. The array substrate comprises: a base substrate (1), thin-film transistors (TFTs), an isolation layer (10) and an organic resin layer (8) formed on the base substrate (1), and a common electrode layer (12) formed on the organic resin layer (8). The isolation layer (10) covers source electrodes (6) and drain electrodes (7) of the TFTs; the organic resin layer (8) covers the isolation layer (10) and is provided with first through holes (9) corresponding to the drain electrodes (7) of the TFTs; the isolation layer (10) is provided with second through holes (11) communicated with the first through holes (9) to expose partial drain electrodes (7); and the dimension of the second through holes (11) is greater than that of the first through holes (9).

Abstract: Embodiments of the disclosure provide an array substrate and a fabrication method thereof, and a display device. The array substrate includes: a base substrate and a switch unit disposed on the base substrate. The array substrate further includes: a passivation layer disposed on the base substrate and a spacer disposed on the passivation layer; and the spacer corresponds to the switch unit.

Abstract: An array substrate and a manufacturing method thereof, a display device, a thin-film transistor (TFT) and a manufacturing method thereof. The array substrate comprises a base substrate and a pixel electrode and a TFT formed on the base substrate. The TFT includes an active layer and a source/drain pattern. The source/drain pattern is connected with the active layer. The pixel electrode is connected with the active layer. The array substrate can improve the aperture ratio of pixels and the chargeability of the TFT.

Abstract: An array substrate, a manufacture method of the array substrate, and a display panel are configured to achieve a combination of solar energy technology and the OLED display technology. The array substrate includes substrate, scanning lines, data lines, a thin film transistor (TFT), a common electrode and a pixel electrode. The array substrate further includes a light-emitting structure configured to provide a backlight source, a solar cell structure and a power output line. The light-emitting structure is provided between the common electrode and the pixel electrode. The solar cell structure is provided between the substrate and the common electrode. The power output line is provided in a same layer as the common electrode and is electrically connected to the solar cell structure so as to transmit electric energy generated by the solar cell structure to an external circuit.

Abstract: The present invention discloses an array substrate, a preparation method for the array substrate, and a display device, wherein the array substrate comprises a gate electrode, a gate insulation layer, an active layer, a source electrode and a drain electrode, and a pixel electrode arranged on a substrate, the active layer includes an electric conduction area, a coverage area covered by the source electrode and the drain electrode, and an exposure area surrounding the coverage area, and the pixel electrode is lapped on the upper surfaces of the drain electrode, the exposure area of the active layer, and the gate insulation layer. According to the present invention, the pixel electrode breaks in the area, with the large gradient angle, of the drain electrode caused by slip-down due to gravity can be avoided, and the lap joint for the pixel electrode and the drain electrode is effectively facilitated.

Abstract: The embodiments of the present invention provide a thin film transistor including a gate, an upper active layer, a lower active layer, an upper source, a lower source, an upper drain and a lower drain. The upper active layer and the lower active layer are disposed at an upper side and a lower side of the gate, respectively, the lower source and the lower drain are connected to the lower active layer, respectively, and the upper source and the upper drain are connected to the upper active layer, respectively. The embodiments of the present invention also provide an array substrate including the thin film transistor, a method of fabricating the array substrate, and a display device including the array substrate.

Abstract: An array substrate, a display device and a manufacturing method of the array substrate. The array substrate includes: a base substrate (1) and a plurality of pixel units located on the base substrate (1), each of the pixel units including a thin film transistor unit. The thin film transistor unit includes: a gate electrode located on the base substrate (1), a gate insulating layer (3) located on the gate electrode, an active layer (4) located on the gate insulating layer (3) and opposed to the gate electrode in position, an ohmic layer (5) located on the active layer (4), a source electrode (6a) and a drain electrode (6b) that are located on the ohmic layer (5) and a resin passivation layer (8) that are located on the source electrode (6a) and the drain electrode (6b) and covers the substrate.

Abstract: A method of manufacturing a TFT array substrate and a TFT array substrate and a display device are provided. During a pattern of a gate layer (2), a pattern of the gate insulating layer (3) and a pattern of the active layer are made, a gate layer (2) material, a gate insulating layer (3) material and an active layer material are deposited successively. The gate layer (2), the gate insulating layer (3) and the active layer are made through one patterning process. At least one mask process is saved and the process complexity is reduced.

Abstract: An embodiment of the present application discloses a capacitive touch panel including a base substrate, on which a plurality of transparent conductive patters being capable of transmitting touch signals and not overlapping with each are provided, and each transparent conductive pattern is an integrated pattern made of a same material layer. An embodiment of the present application further provides a method for manufacturing a capacitive touch panel, which includes forming a plurality of transparent conductive patterns on a base substrate through one mask patterning process. An embodiment of the present application further includes a display device comprising the capacitive touch panel as described above. An embodiment of the present application can save masks and can manufacture capacitive touch panels at a low cost. Furthermore, the embodiments of the present application have advantages of high production efficiency and of high yield rate.

Abstract: Embodiments of the present disclosure provide a method for producing a TFT array substrate and a method for producing a display apparatus. The method for producing the TFT array substrate includes forming a semiconductor layer onto a substrate, and forming a shading pattern onto the semiconductor layer at a position at least corresponding to a channel region of the semiconductor layer, wherein the shading pattern contacts with the semiconductor layer; forming a transparent electrode of ITO material onto the substrate formed with the shading pattern, and removing the shading pattern after forming the transparent electrode.

Abstract: An array substrate and a display device are presented. The array substrate includes: a base substrate and a plurality of thin film transistor units located on the base substrate, wherein, the thin film transistor unit includes: a first gate electrode located on the base substrate, a gate insulating layer located on the first gate electrode, a drain electrode disposed in the same layer as the first gate electrode, an active layer located on the drain electrode, a source electrode located on the active layer, a first transparent conductive layer is provided between the base substrate and the first gate electrode and the drain electrode that are disposed in the same layer, and the gate insulating layer is also disposed between the first gate electrode plus the first transparent conductive layer beneath it and the drain electrode plus the first transparent conductive layer beneath it.