Abstract: Presented herein are embodiments of an improved asymmetric quantization, which may generally be referred to as improved asymmetric quantization (IAQ) embodiments. IAQ embodiments combine the benefits of conventional asymmetric quantization and symmetric quantization but also provide additional computation efficiencies. Embodiments of IAQ adopt an asymmetric range of the weights of a neural network layer, so they circumvent the limitation of symmetric range of symmetric quantization. Moreover, the inference process of a neural network quantized by an IAQ embodiment is much faster than that of the neural network quantized by conventional asymmetric quantization by quantizing an offset value of each layer.

Abstract: A method for data processing, a processor chip. The method includes: acquiring a first relationship instruction; executing at least one first computing instruction acquired before the first relationship instruction based on the first relationship instruction; and sending acknowledgment information based on the first relationship instruction in response to completing executing the at least one first computing instruction, to cause a second coprocessor receiving the acknowledgment information to revert to a state of acquiring a second computing instruction after the second relationship instruction acquired by a second coprocessor based on the acknowledgment information.

Abstract: Embodiments of the present disclosure relate to a data processing method and apparatus for a neural network. The neural network is provided with at least one activation function. A method may include: converting, in response to that an activation function acquiring current data is a target function, based on a conversion relationship between the target function and a preset function, the current data into input data of the preset function; finding out first output data of the preset function with the input data as an input in a lookup table corresponding to the preset function; obtaining second output data of the target function with the current data as an input by conversion based on the conversion relationship and the first output data; and outputting the second output data.

Abstract: Embodiments of the present disclosure provide a method and apparatus for generating a chip-based computing function, a device, and a storage medium. The method includes: acquiring an input parameter value associated with a computing function supported by a chip; determining, based on the input parameter value, at least one candidate computing function template corresponding to the computing function, the candidate computing function template having a configurable parameter associated with performance of the candidate computing function template, and the configurable parameter having at least one candidate value; and determining, according to the input parameter value and candidate values of the configurable parameter of the candidate computing function template, a target computing function template and a target value of a configurable parameter of the target computing function template.

Abstract: A method for data processing, a processor chip. The method includes: acquiring a first relationship instruction; executing at least one first computing instruction acquired before the first relationship instruction based on the first relationship instruction; and sending acknowledgment information based on the first relationship instruction in response to completing executing the at least one first computing instruction, to cause a second coprocessor receiving the acknowledgment information to revert to a state of acquiring a second computing instruction after the second relationship instruction acquired by a second coprocessor based on the acknowledgment information.

Abstract: Embodiments of the present disclosure disclose an artificial intelligence chip and an instruction execution method for an artificial intelligence chip. A specific embodiment of the artificial intelligence chip includes: an instruction memory, a data memory, at least one general execution unit, and at least one dedicated execution unit. The instruction memory is configured to: receive a kernel code including at least one code block. The general execution unit is configured to: receive the code block, lock the dedicated execution unit associated with the received code block, and send an instruction in the received code block to the locked dedicated execution unit. The dedicated execution unit is configured to: execute the received instruction, and store an execution result in the data memory. The data memory is configured to: store the execution result sent by the dedicated execution unit.

Abstract: Embodiments of the present disclosure disclose a method and apparatus for executing an instruction for an artificial intelligence chip. A specific embodiment of the method comprises: receiving descriptive information for describing a neural network model sent by a central processing unit, the descriptive information including at least one operation instruction; analyzing the descriptive information to acquire the at least one operation instruction; determining, for an operation instruction of the at least one operation instruction, a special-purpose execution component executing the operation instruction, and locking the determined special-purpose execution component; sending the operation instruction to the determined special-purpose execution component; and unlocking the determined special-purpose execution component in response to receiving a notification for instructing the operation instruction being completely executed.

Abstract: Presented herein are embodiments of an improved asymmetric quantization, which may generally be referred to as improved asymmetric quantization (IAQ) embodiments. IAQ embodiments combine the benefits of conventional asymmetric quantization and symmetric quantization but also provide additional computation efficiencies. Embodiments of IAQ adopt an asymmetric range of the weights of a neural network layer, so they circumvent the limitation of symmetric range of symmetric quantization. Moreover, the inference process of a neural network quantized by an IAQ embodiment is much faster than that of the neural network quantized by conventional asymmetric quantization by quantizing an offset value of each layer.

Abstract: Embodiments of the present disclosure provide a method and apparatus for generating a chip-based computing function, a device, and a storage medium. The method includes: acquiring an input parameter value associated with a computing function supported by a chip; determining, based on the input parameter value, at least one candidate computing function template corresponding to the computing function, the candidate computing function template having a configurable parameter associated with performance of the candidate computing function template, and the configurable parameter having at least one candidate value; and determining, according to the input parameter value and candidate values of the configurable parameter of the candidate computing function template, a target computing function template and a target value of a configurable parameter of the target computing function template to implement the chip-based computing function.

Abstract: Embodiments of the present disclosure disclose an artificial intelligence chip and an instruction execution method for an artificial intelligence chip. A specific embodiment of the artificial intelligence chip includes: an instruction memory, a data memory, at least one general execution unit, and at least one dedicated execution unit. The instruction memory is configured to: receive a kernel code including at least one code block. The general execution unit is configured to: receive the code block, lock the dedicated execution unit associated with the received code block, and send an instruction in the received code block to the locked dedicated execution unit. The dedicated execution unit is configured to: execute the received instruction, and store an execution result in the data memory. The data memory is configured to: store the execution result sent by the dedicated execution unit.

Abstract: Embodiments of the present disclosure relate to a data processing method and apparatus for a neural network. The neural network is provided with at least one activation function. A method may include: converting, in response to that an activation function acquiring current data is a target function, based on a conversion relationship between the target function and a preset function, the current data into input data of the preset function; finding out first output data of the preset function with the input data as an input in a lookup table corresponding to the preset function; obtaining second output data of the target function with the current data as an input by conversion based on the conversion relationship and the first output data; and outputting the second output data.

Abstract: Embodiments of the present disclosure disclose a method and apparatus for executing an instruction for an artificial intelligence chip. A specific embodiment of the method comprises: receiving descriptive information for describing a neural network model sent by a central processing unit, the descriptive information including at least one operation instruction; analyzing the descriptive information to acquire the at least one operation instruction; determining, for an operation instruction of the at least one operation instruction, a special-purpose execution component executing the operation instruction, and locking the determined special-purpose execution component; sending the operation instruction to the determined special-purpose execution component; and unlocking the determined special-purpose execution component in response to receiving a notification for instructing the operation instruction being completely executed.