Abstract: An array substrate has a hole-opening region, a display region surrounding the hole-opening region, and a hole-peripheral region located between the hole-opening region and the display region. The array substrate includes a substrate and a driving circuit layer located on the substrate. The driving circuit layer includes a constant-voltage conductive ring and a plurality of signal lines. At least some of the plurality of signal lines are target signal lines. The target signal lines each include a lead portion and a winding portion connected thereto. The lead portion extends from the hole-peripheral region to the display region, and the winding portion is located in the hole-peripheral region and is disposed along an edge of the hole-opening region. The constant-voltage conductive ring is located in the hole-peripheral region and is disposed around the hole-opening region. The winding portion is located between the constant-voltage conductive ring and the hole-opening region.

Abstract: A display substrate and a display device. In the display substrate, a plurality of first output ends of the plurality of straight edge gate driving structures are connected to the plurality of first signal lines through a plurality of first connection structures, and a plurality of second output ends of the plurality of rounded corner gate driving structures are connected to the plurality of second signal lines through a plurality of second connection structures; the first conductive part and the second conductive part are located in a same conductive layer, and a number and a type of the plurality of via connection structures in each of the plurality of first connection structures are the same as a number and a type of the plurality of via connection structures in each of the plurality of second connection structures.

Abstract: A display substrate and a display device are provided, which includes: a pixel circuit, on the base substrate and including a driving transistor and a storage capacitor; the display substrate includes a first conductive layer, a second conductive layer and a first semiconductor layer, the first conductive layer includes a first connection structure, the first connection structure includes a first end and a second end, the first end is connected with the first semiconductor layer, the second end is electrically connected with a gate electrode of the driving transistor and a first electrode plate of the storage capacitor; the first conductive layer is at a side of the first semiconductor layer away from the base substrate, the second conductive layer is at a side of the first conductive layer away from the base substrate.

Abstract: A display panel and a display apparatus are provided. The display panel includes: first color sub-pixels in a first color sub-pixel column, second color sub-pixels in a second color sub-pixel column, and third color sub-pixels in a third color sub-pixel column; multiple data signal lines including a first data signal line connected to the first color sub-pixel column, a second data signal line connected to the second color sub-pixel column, and a third data signal line connected to the third color sub-pixel column; multiple compensation units including a first compensation capacitor connected to the first data signal line, a second compensation capacitor connected to the second data signal line, and a third compensation capacitor connected to the third data signal line, a capacitance value of the third compensation capacitor is greater than a capacitance value of the first compensation capacitor, which that of the second compensation capacitor.

Abstract: Disclosed is a display substrate, including a base substrate (100), a circuit structure layer disposed on the base substrate (100), and a light emitting structure layer. The circuit structure layer includes a plurality of pixel circuits located in a first display region (A1), at least one first trace 231 extending along a first direction (D1), at least one second trace 232 extending along a second direction (D2), and at least one third trace located in a peripheral region (BB). The at least one first trace (231) is electrically connected with the at least one second trace (232) and the at least one third trace is electrically connected with at least one of following; the at least one first trace (231) and the at least one second trace (232).

Abstract: Disclosed are a display substrate and a preparation method therefor, and a display apparatus. The display substrate includes a display region and a bonding region, wherein the display region includes M pixel rows arranged sequentially, at least one pixel row includes a scan signal line and a plurality of sub-pixels arranged sequentially along an extension direction of the scan signal line, at least one sub-pixel includes a pixel drive circuit connected with the scan signal line, the pixel drive circuit at least includes a storage capacitor and a first transistor as a first initialization transistor, and the scan signal line at least includes a second scan signal line that controls the first transistor to be turned on or off, and in the at least one pixel row, the second scan signal line is arranged on a side of the storage capacitor close to a display region boundary.

Abstract: A display substrate and a display apparatus are provided, wherein the display substrate includes: a base substrate and a drive structure layer provided on the base substrate, the drive structure layer includes pixel circuits arranged in an array, the pixel circuits arranged in an array includes a plurality of power supply lines; the pixel circuit further includes a capacitor, the capacitor includes a first electrode plate and a second electrode plate; the plurality of power supply lines include a plurality of first power connection lines disposed in a first conductive layer and a plurality of second power connection lines disposed in a second conductive layer, the second conductive layer is located on a side of the first conductive layer away from the base substrate, the first power connection line and the second power connection line extend in a first direction.

Abstract: A display substrate and a display device are provided. The display substrate includes first voltage lines in multiple columns, and multiple rows and multiple columns of pixel driving circuits arranged on a base substrate; the pixel driving circuit includes a driving transistor and a compensation transistor; an orthographic projection of the first voltage line on the base substrate at least partially overlaps an orthographic projection of a gate electrode of the driving transistor on the base substrate; the gate electrode of the driving transistor is coupled to a first electrode of the compensation transistor through a first conductive connection portion; a second electrode of the compensation transistor is coupled to a first electrode of the driving transistor; an orthographic projection of the first voltage line on the base substrate at least partially overlaps an orthographic projection of the first conductive connection portion on the base substrate.

Abstract: Described are a display panel and a display device. The display panel includes a base substrate provided with a first display region and a second display region; a plurality of first pixel circuit groups arrayed in the second display region, wherein each of the first pixel circuit groups includes one first pixel circuit and at most six second pixel circuits, and the first pixel circuit and the at most six second pixel circuits arranges along a row direction of the display panel; a plurality of first light-emitting elements disposed in the first display region; a plurality of second light-emitting elements disposed in the second display region; and a plurality of connection traces extending along the row direction.

Abstract: A scan circuit is provided. The scan circuit includes a plurality of stages. A respective stage of the scan circuit includes a first scan unit and a second scan unit configured to provide control signals to different rows of subpixels. Output from the first scan unit is input to the second scan unit through one of M rows of subpixels. M is an integer ?2.

Abstract: A display substrate is provided, and the display substrate includes a first display region, a second display region and a transitional display region; the first display region includes a plurality of first sub-pixels, each first sub-pixel (P1) includes a first light-emitting device; the second display region includes a plurality of first pixel driving circuit and a plurality of first transition pixel driving circuits, the plurality of first pixel driving circuits are electrically connected to first light-emitting devices respectively through a plurality of first wires; the transition display region is between the first display region and the second display region, including a first transition sub-region and a second transition sub-region, a plurality of first transition light-emitting devices in the first transition sub-region are electrically connected to the plurality of first pixel driving circuits respectively through a plurality of second wires, the second transition sub-region includes a plurality of se

Abstract: A display substrate and a display device are provided. The display substrate has a display side and includes a base substrate, a drive circuit layer, a first electrode layer, and a pixel definition layer. The drive circuit layer includes a plurality of first gaps to allow light from the display side to transmit therethrough. The first electrode layer includes a plurality of first electrode patterns and a plurality of light-blocking patterns. The pixel definition layer includes a plurality of sub-pixel openings exposing the plurality of first electrode patterns, respectively. In a direction perpendicular to the base substrate, at least a portion of the plurality of light-blocking patterns do not overlap with the plurality of sub-pixel openings, and correspond to and at least partially overlapped with at least a portion of the plurality of first gaps, respectively.

Abstract: A display panel includes a substrate, a circuit structure layer, a first electrode layer and a pixel definition layer. The circuit structure layer includes a plurality of pixel driving circuits, and the first electrode layer includes a plurality of first electrodes; the pixel definition layer has a plurality of pixel openings therein. An orthographic projection of a first electrode of at least one first electrode on the substrate at least partially overlaps with both of an orthographic projection, on the substrate, of a gate of a data compensation transistor in a pixel driving circuit corresponding to the first electrode of the at least one first electrode and an orthographic projection, on the substrate, of a gate of a data compensation transistor in at least one pixel driving circuit adjacent to the pixel driving circuit corresponding to the first electrode of the at least one first electrode.

Abstract: A display substrate includes a base substrate and a blocking structure on the base substrate and in a non-display region, and further includes first and second conductive layers, and an anode conductive layer on the base substrate and sequentially arranged away from the base substrate; the first conductive layer and the anode conductive layer have first and second boundary lines, respectively; extending directions of the first and second boundary lines are substantially parallel to each other; the second boundary line is on a side of the first boundary line away from the display region; in the fan-out region, the first conductive layer terminates, and the second conductive layer is continuously arranged; in the corner region, the anode conductive layer terminates, and an orthographic projection of the blocking structure on the base substrate at least partially covers an orthographic projection of the first and second boundary lines on the base substrate.

Abstract: An array substrate is provided. The array substate includes a base substrate; a semiconductor material layer on the base substrate; and a plurality of voltage supply lines on a side of the semiconductor material layer away from the base substrate. In a respective subpixel, the semiconductor material layer includes an active layer of a third transistor, an active layer of a fifth transistor, an active layer of a driving transistor, and a third node portion that is connected to the active layer of the third transistor, the active layer of the fifth transistor, and the active layer of the driving transistor in the respective subpixel. At least 30% of an orthographic projection of the third node portion on the base substrate is non-overlapping with an orthographic projection of a respective voltage supply line on the base substrate.

Abstract: Embodiments of the present disclosure provide an application control method and apparatus, and an electronic device. The solution includes: receiving a first input in a case that a first interface of a first application is displayed; displaying an adjustment control, displaying the first interface in a first display area, and displaying a second interface in a second display area in response to the first input, the second application being an application having an association relation with the first application; receiving a second input for the adjustment control; and adjusting an association level between the first application and the second application in response to the second input, the association level being used for indicating any one of the following: the number of association operations and the importance of the association operations, and the association operations being association operations between the first application and the second application.

Abstract: The present disclosure provides a method and apparatus for simulating a physiological dynamic blood flow, a computer device and a storage medium. The method for simulating a physiological dynamic blood flow includes the following steps: acquiring related parameters of a cardio-aortic system in a complete cardiac cycle under a normal physiological state, and acquiring morphological and motion imaging data of the cardio-aortic system in the complete cardiac cycle; constructing a circulation dynamic loading function for cyclic dynamic contraction of a left ventricle; constructing a function between a left ventricular (LV) dynamic blood pressure and an LV dynamic volume; constructing a dynamic arterial blood flow volume function; constructing a cyclic opening and closing activation function of an aortic valve; and constructing a physiological dynamic blood flow model, and simulating the physiological dynamic blood flow according to the physiological dynamic blood flow model.

Abstract: A dual camera assembly, an electronic apparatus and a method of acquiring an image are provided. The dual camera assembly includes: a first camera lens and a second camera lens; a first sensor configured for receiving light that has passed through the first camera lens; a liquid crystal light valve and a polarizer which are on a side, which is close to the first camera lens, of the first sensor. The polarizer is on a side, which is close to the first sensor, of the liquid crystal light valve, and liquid crystal molecules in the liquid crystal light valve are rotatable.

Abstract: Embodiments of the present disclosure provide a display panel, a display device and an image acquiring method thereof. The display panel includes a first imaging region, the first imaging region is provided with a filter, the filter is configured to adjust a polarization direction of light incident into the filter, and configured to filter out polarized light having a set polarization direction in the adjusted light.