Patents by Inventor Jiayu HE

Jiayu HE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11941227
    Abstract: The technical problem of reducing the amount of processing involved when searching for customizable media content items that are suitable for incorporating input text is addressed by providing a hybrid search system. In some examples, the hybrid search system executes a rough search first, to determine whether a line of text can be incorporated into a media content item, based on character count conditions associated with the media content item. A more thorough evaluation of the input text with respect to the media content item is executed subsequent to the rough search if the rough search produces a result indicating uncertainty with respect to whether the combination of specific characters included in the input text can or cannot be incorporated into the media content item.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: March 26, 2024
    Assignee: SNAP INC.
    Inventors: Bradley Kotsopoulos, Jiayu He
  • Publication number: 20240012537
    Abstract: The technical problem of reducing the amount of processing involved when searching for customizable media content items that are suitable for incorporating input text is addressed by providing a hybrid search system. In some examples, the hybrid search system executes a rough search first, to determine whether a line of text can be incorporated into a media content item, based on character count conditions associated with the media content item. A more thorough evaluation of the input text with respect to the media content item is executed subsequent to the rough search if the rough search produces a result indicating uncertainty with respect to whether the combination of specific characters included in the input text can or cannot be incorporated into the media content item.
    Type: Application
    Filed: September 21, 2023
    Publication date: January 11, 2024
    Inventors: Bradley Kotsopoulos, Jiayu He
  • Patent number: 11797155
    Abstract: The technical problem of reducing the amount of processing involved when searching for customizable media content items that are suitable for incorporating input text is addressed by providing a hybrid search system. In some examples, the hybrid search system executes a rough search first, to determine whether a line of text can be incorporated into a media content item, based on character count conditions associated with the media content item. A more thorough evaluation of the input text with respect to the media content item is executed subsequent to the rough search if the rough search produces a result indicating uncertainty with respect to whether the combination of specific characters included in the input text can or cannot be incorporated into the media content item.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: October 24, 2023
    Assignee: SNAP INC.
    Inventors: Bradley Kotsopoulos, Jiayu He
  • Publication number: 20230318992
    Abstract: A text string provided by a second client device of a second user is received by a first client device of a first user. The text string is parsed into one or more text portions. A score is assigned to each of the one or more text portions based on a specified criterion. One or more relevant tags of a plurality of tags are determined based on the one or more text portions. One or more media overlays are selected based on the one or more relevant tags and the assigned score for each of the one or more text portions. The text string with a reply interface for sending a reply message to the second client device is displayed.
    Type: Application
    Filed: March 8, 2023
    Publication date: October 5, 2023
    Inventor: Jiayu He
  • Publication number: 20230122965
    Abstract: A display substrate includes: a base substrate; a metal light-shielding layer disposed on the base substrate; a plurality of pixel units disposed on the base substrate; a plurality of first thin film transistors disposed on the metal light-shielding layer and configured to drive the pixel units; a plurality of photodiodes disposed on the metal light-shielding layer and configured to convert light emitted from the pixel units into photocurrents, each of the photodiodes including a first electrode; a plurality of second thin film transistors disposed on the metal light-shielding layer and configured to receive the photocurrents, so that light emission of the pixel units are compensated according to the photocurrents. Output terminals of the first thin film transistors are electrically connected to the metal light-shielding layer, and a gate of the first thin film transistor is electrically connected to the first electrode. Further disclosed are a display panel and a display substrate manufacturing method.
    Type: Application
    Filed: June 3, 2021
    Publication date: April 20, 2023
    Inventors: Jiayu HE, Ce NING, Zhengliang LI, Hehe HU, Jie HUANG, Nianqi YAO
  • Publication number: 20230091604
    Abstract: The present disclosure relates to the field of display technologies, and in particular to a thin film transistor and a method for manufacturing the same, an array substrate and a display device. An active layer of the thin film transistor includes at least two metal oxide semi-conductor layers, the at least two metal oxide semi-conductor layers include a channel layer and a first protection layer, and metals in the channel layer include tin, and at least one of indium, gallium and zinc. The first protection layer includes praseodymium used to absorb photo-generated electrons from at least one of the channel layer and the first protection layer which is under light irradiation and reduce a photo-generated current caused by the light irradiation.
    Type: Application
    Filed: January 28, 2021
    Publication date: March 23, 2023
    Inventors: Jie Huang, Jiayu He, Ce Ning, Zhengliang Li, Hehe Hu, Fengjuan Liu, Nianqi Yao, Kun Zhao, Tianmin Zhou, Jiushi Wang, Zhongpeng Tian
  • Publication number: 20230060645
    Abstract: A metal oxide thin film transistor is provided and includes a gate, a gate insulating layer, an active layer and a source-drain metal layer stacked on a side of a backplane, the active layer and the gate are provided on both sides of the gate insulating layer, the source-drain metal layer is provided on a side of the active layer away from the backplane, the active layer includes: a first metal oxide semiconductor layer provided on a side of the gate insulating layer away from the gate; a second metal oxide semiconductor layer provided on a surface of the first metal oxide semiconductor layer away from the gate.
    Type: Application
    Filed: May 27, 2021
    Publication date: March 2, 2023
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Jiayu HE, Ce NING, Zhengliang LI, Hehe HU, Jie HUANG, Kun ZHAO, Nianqi YAO
  • Publication number: 20230036385
    Abstract: The disclosure provides a thin-film transistor, a manufacturing method thereof, an array substrate and a display panel, and belongs to the technical field of thin-film transistor devices. The thin-film transistor includes a base substrate, an active layer on the base substrate including a plurality of semiconductor nanowires, and a plurality of guiding projections on the base substrate which extend along a first direction and are arranged at intervals and each of which includes two side walls extending along the first direction, and the semiconductor nanowire extends along a side wall of the guiding projection. In the thin-film transistor, since the semiconductor nanowires are used as the active layer, mobility and concentration of carriers in the thin-film transistor can be effectively increased and therefore performance of the thin-film transistor can be improved. A length of the semiconductor nanowire is not limited, and a size of the thin-film transistor is not limited.
    Type: Application
    Filed: June 24, 2021
    Publication date: February 2, 2023
    Inventors: Jiayu HE, Ce NING, Zhengliang LI, Hehe HU, Jie HUANG, Nianqi YAO, Kun ZHAO, Xue LIU, Zhi WANG, Feng GUAN
  • Publication number: 20230015871
    Abstract: A thin film transistor, a manufacturing method thereof, an array substrate and an electronic device arc provided. The thin film transistor includes an active layer including multiple oxide layers which includes a channel layer, a transition layer and a first barrier layer, the channel layer is an layer with a highest carrier mobility, the channel layer is a crystalline or amorphous oxide layer, the transition layer is in direct contact with the channel layer, the first barrier layer is an outermost oxide layer, the first barrier layer and the transition layer are both crystalline oxide layers; a crystallization degree of the first barrier layer and a crystallization degree of the transition layer are greater than a crystallization degree of the channel layer, and a band gap of the first barrier layer and a band gap of the transition layer are larger than a band gap of the channel layer.
    Type: Application
    Filed: May 27, 2021
    Publication date: January 19, 2023
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Jie Huang, Ce Ning, Zhengliang Li, Hehe Hu, Jiayu He, Nianqi Yao, Feng Qu, Xiaochun Xu
  • Publication number: 20230006070
    Abstract: A semiconductor substrate manufacturing method and a semiconductor substrate. The manufacturing method includes: forming a first semiconductor layer on the base substrate at a first temperature with a first oxide semiconductor material; forming the second semiconductor layer directly on the first semiconductor layer with a second oxide semiconductor material; and performing a patterning process such that the first semiconductor layer and the second semiconductor layer are respectively patterned into a seed layer and a first channel layer. Both the first oxide semiconductor material and the second oxide semiconductor material are capable of forming crystalline phases at a second temperature, the second temperature is less than or equal to 40° C., and the first temperature is greater than or equal to 100° C.
    Type: Application
    Filed: May 27, 2021
    Publication date: January 5, 2023
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Jie Huang, Ce Ning, Zhengliang Li, Hehe Hu, Jiayu He, Nianqi Yao, Kun Zhao, Feng Qu, Xiaochun Xu
  • Publication number: 20230004260
    Abstract: The technical problem of reducing the amount of processing involved when searching for customizable media content items that are suitable for incorporating input text is addressed by providing a hybrid search system. In some examples, the hybrid search system executes a rough search first, to determine whether a line of text can be incorporated into a media content item, based on character count conditions associated with the media content item. A more thorough evaluation of the input text with respect to the media content item is executed subsequent to the rough search if the rough search produces a result indicating uncertainty with respect to whether the combination of specific characters included in the input text can or cannot be incorporated into the media content item.
    Type: Application
    Filed: September 8, 2021
    Publication date: January 5, 2023
    Inventors: Bradley Kotsopoulos, Jiayu He
  • Patent number: 11508786
    Abstract: The disclosure provides a display backplane, a method of manufacturing the same, and a display device using the same. The display backplane includes a substrate; a thin film transistor structure layer disposed on one side of the substrate and including thin film transistors, a gate insulating layer, and an interlayer dielectric layer, where an etching rate of the interlayer dielectric layer carried out under an HF atmosphere condition is less than 2 ?/S; and photosensitive devices spaced apart from the thin film transistor structure layer and disposed on one side of the thin film transistor structure layer away from the substrate. The interlayer dielectric layer has a high compactness, and can effectively block H from entering the active layer of the thin film transistor to conductorize the active layer, thus guaranteeing good optical characteristics of the thin film transistor while carrying out optical compensation.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: November 22, 2022
    Assignee: BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD.
    Inventors: Jiayu He, Xue Liu, Zhengliang Li
  • Publication number: 20220352283
    Abstract: An organic electroluminescent display substrate is provided, which includes a base substrate, and a light-emitting unit and a light-sensing unit arranged on the base substrate, wherein the light-sensing unit is arranged on a light-emitting side of the light-emitting unit, and configured for sensing an intensity of light emitted from the light-emitting unit; a first planarization layer is arranged between the light-sensing unit and the light-emitting unit; the light-sensing unit comprises a first thin film transistor and a photosensitive sensor arranged sequentially in that order in a direction away from the base substrate, and a second planarization layer is arranged between the photosensitive sensor and the first thin film transistor. A display panel, a display device and a method for manufacturing the organic electroluminescent display substrate are further provided.
    Type: Application
    Filed: November 13, 2020
    Publication date: November 3, 2022
    Inventors: Jiayu HE, Ce NING, Zhengliang LI, Hehe HU, Jie HUANG, Nianqi YAO, Xue LIU
  • Publication number: 20220278162
    Abstract: An array substrate includes a substrate, the array substrate includes a display region and a detection region. And the detection region includes a thin film transistor located on the substrate and a photodiode located on one side of the thin film transistor away from the substrate, and the array substrate further includes a first inorganic protective layer, an organic protective layer and a second inorganic protective layer located between the thin film transistor and the photodiode. And the first inorganic protective layer, the organic protective layer and the second inorganic protective layer are stacked in sequence in a direction away from the substrate, and an orthographic projection of the photodiode on the substrate is within the range of the orthographic projection of the organic protective layer on the substrate.
    Type: Application
    Filed: August 24, 2021
    Publication date: September 1, 2022
    Inventors: Jiayu HE, Ce NING, Zhengliang LI, Hehe HU, Jie HUANG, Nianqi YAO, Kun ZHAO
  • Publication number: 20220223745
    Abstract: A thin film transistor, a manufacturing method thereof, a display substrate, and a display device are provided. The thin film transistor includes: a substrate, an active layer, a gate, a source and a drain. The active layer is arranged on the substrate and formed as a grid, including silicon nanowires extending along a first direction, the active layer includes source and drain regions oppositely arranged along the first direction, and a channel region located therebetween. The gate is arranged on the substrate, and an orthographic projection of the gate onto the substrate overlaps with orthographic projections for silicon nanowires in the channel region onto the substrate. The source and drain are arranged on the substrate, the source contacts silicon nanowires in the source region, and the drain contacts silicon nanowires in the drain region.
    Type: Application
    Filed: May 18, 2021
    Publication date: July 14, 2022
    Inventors: Jiayu HE, Ce NING, Zhengliang LI, Hehe HU, Jie HUANG, Nianqi YAO, Zhi WANG, Feng GUAN
  • Patent number: 11372451
    Abstract: A display substrate, a display device, and a method of forming a display substrate are provided. The display substrate includes: a flexible base substrate and a plurality of pixel islands arranged on the flexible base substrate, where the plurality of pixel islands are arranged in an array, two adjacent pixel islands are connected through an island bridge, display units are arranged on the pixel islands, the display units on the pixel islands are electrically connected through an inter-island connection line arranged on the island bridge, a region outside the pixel islands and the island bridge is a hollow area, and axes of four island bridges around the hollow area are arranged as a parallelogram.
    Type: Grant
    Filed: June 12, 2020
    Date of Patent: June 28, 2022
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Jiayu He, Xue Liu, Hehe Hu, Zhengliang Li
  • Publication number: 20220186359
    Abstract: A fixture, a tray and a sputtering system. The fixture is internally provided with a support structure and a clamping structure connected with each other, wherein the clamping structure is configured to clamp a to-be-sputtered substrate; an orthographic projection of the clamping structure on a plane where the support structure is located and the support structure share an superimposed area and are separate in non-superimposed areas; wherein the support structure located in the non-superimposed area and/or the clamping structure located in the non-superimposed area has a first hollowed structure. The fixture is internally provided with the first hollowed structure, such that a part of an area of the to-be-sputtered substrate covered by the fixture may be exposed via the first hollowed structure when the fixture holds the to-be-sputtered substrate, so as to reduce the area of the to-be-sputtered substrate covered by the fixture.
    Type: Application
    Filed: September 24, 2021
    Publication date: June 16, 2022
    Inventors: Nianqi YAO, Ce NING, Zhengliang LI, Hehe HU, Dapeng XUE, Lizhong WANG, Shuilang DONG, Jie HUANG, Jiayu HE, Lubin SHI, Yancai LI
  • Publication number: 20220048028
    Abstract: A microfluidic channel backplane includes a base, and a plurality of microfluidic channels, a sample-adding channel and an enrichment channel that are disposed above the base. Each microfluidic channel of the plurality of microfluidic channels includes a first end and a second end. The sample-adding channel is communicated with first ends of the plurality of microfluidic channels. The enrichment channel includes a first enrichment sub-channel and a second enrichment sub-channel. The first enrichment sub-channel is communicated with second ends of the plurality of microfluidic channels, and one end of the second enrichment sub-channel is communicated with the first enrichment sub-channel.
    Type: Application
    Filed: January 23, 2020
    Publication date: February 17, 2022
    Inventors: Xiaochen MA, Ce NING, Chao LI, Jiayu HE, Xueyuan ZHOU, Xiao ZHANG, Xin GU, Zhengliang LI, Guangcai YUAN
  • Publication number: 20210217784
    Abstract: An array substrate, a method for manufacturing an array substrate, and a display panel are provided. The array substrate includes: a base substrate; a thin film transistor on the base substrate; and a PIN diode on a side of the thin film transistor away from the base substrate, in a direction running away the base substrate from the thin film transistor, the PIN diode including a first electrical conduction type semiconductor layer and an intrinsic semiconductor layer and a second electrical conduction type semiconductor layer stacked in sequence, wherein a material from which the first electrical conduction type semiconductor layer is made includes one or more of following materials: metal oxide, metal sulfide, metal selenide, metal nitride, metal phosphide, or metal arsenide.
    Type: Application
    Filed: November 21, 2019
    Publication date: July 15, 2021
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zhengliang Li, Jiayu He, Hehe Hu, Wenlin Zhang, Song Liu, Xiaochen Ma, Nianqi Yao, Jie Huang
  • Publication number: 20210167143
    Abstract: The disclosure provides a display backplane, a method of manufacturing the same, and a display device using the same. The display backplane includes a substrate; a thin film transistor structure layer disposed on one side of the substrate and including thin film transistors, a gate insulating layer, and an interlayer dielectric layer, where an etching rate of the interlayer dielectric layer carried out under an HF atmosphere condition is less than 2 ?/S; and photosensitive devices spaced apart from the thin film transistor structure layer and disposed on one side of the thin film transistor structure layer away from the substrate. The interlayer dielectric layer has a high compactness, and can effectively block H from entering the active layer of the thin film transistor to conductorize the active layer, thus guaranteeing good optical characteristics of the thin film transistor while carrying out optical compensation.
    Type: Application
    Filed: March 31, 2020
    Publication date: June 3, 2021
    Inventors: Jiayu HE, Xue LIU, Zhengliang LI