Patents by Inventor JICHULL JEONG

JICHULL JEONG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • LAYOUT DESIGN SYSTEM USING DEEP REINFORCEMENT LEARNING AND LEARNING METHOD THEREOF
    Publication number: 20240126971
    Abstract: A layout optimization system for correcting a target layout of a semiconductor process includes a deep reinforcement learning (DRL) module, a memory storing instructions, and a processor configured to execute the instructions to receive a target layout, generate, by the DRL module, a prediction layout by applying a simulation to the target layout, generate, by the DRL module, an optimal layout based on the prediction layout, and apply a size correction to at least one pattern of the prediction layout based on the optimal layout.
    Type: Application
    Filed: March 22, 2023
    Publication date: April 18, 2024
    Applicant: SAMSUNG ELECTRONICS CO, LTD.
    Inventors: HYUNJOONG KIM, TAEHYUN KIM, JICHULL JEONG, EUIHYUN CHEON