Abstract: A method for performing data access management of a memory device in predetermined communications architecture to enhance sudden power off recovery (SPOR) of page-group-based redundant array of independent disks (RAID) protection with aid of suspendible serial number and associated apparatus are provided. The method may include: utilizing the memory controller to write preceding data and metadata thereof into at least one set of preceding pages in a first active block to make the metadata carry at least one preceding serial number; writing dummy data and other metadata into at least one set of dummy pages in the first active block to make the other metadata carry at least one suspended serial number which is equal to a last serial number among the at least one preceding serial number; and utilizing the memory controller to write subsequent data and metadata thereof to make it carry at least one subsequent serial number.

Abstract: A method for performing data access management of a memory device in a predetermined communications architecture with aid of unbalanced table regions and associated apparatus are provided.

Abstract: A method for performing data access management of a memory device in a predetermined communications architecture with aid of unbalanced table search and associated apparatus are provided. The method may include: utilizing a memory controller to receive a plurality of host commands from a host device through a transmission interface circuit of the memory controller, perform the unbalanced table search to receive a set of first data and a set of second data with first and second active blocks according to first and second commands among the host commands, respectively, and update first and second temporary physical-to-logical (P2L) address mapping tables; and selectively updating a first P2L address mapping table and a second P2L address mapping table according to the first temporary P2L address mapping table and the second temporary P2L address mapping table, respectively, for performing subsequent processing.

Abstract: A method for performing data access management of a memory device in predetermined communications architecture to enhance sudden power off recovery (SPOR) of page-group-based redundant array of independent disks (RAID) protection with aid of multi-table control using dummy flag and associated apparatus are provided. The method may include: after occurrence of a sudden power off (SPO) event, utilizing the memory controller to perform a SPOR procedure in response to the SPO event, for example, updating a temporary physical-to-logical (P2L) address mapping table corresponding to a first active block to carry the dummy flag in each P2L table entry of at least one P2L table entry corresponding to at least one set of damaged pages; and after performing the SPOR procedure in response to the SPO event, utilizing the memory controller to write subsequent data into at least one set of subsequent pages in the damaged page group.

Abstract: A method for performing data access management of a memory device in a predetermined communications architecture with aid of unbalanced table update and associated apparatus are provided. The method may include: utilizing a memory controller to receive a plurality of host commands from a host device through a transmission interface circuit of the memory controller, receive a set of first data and a set of second data with first and second active blocks according to first and second commands among the host commands, respectively, and update first and second temporary physical-to-logical (P2L) address mapping tables; and in response to a table region of any temporary P2L address mapping table being full, updating a first P2L address mapping table according to the first temporary P2L address mapping table and selectively updating a second P2L address mapping table according to the second temporary P2L address mapping table, for performing subsequent processing.

Abstract: A method for performing table management of a memory device in predetermined communications architecture with aid of flexible table page grouping and associated apparatus are provided. The method may include: utilizing the memory controller to perform a table management procedure to manage at least one table regarding internal management of the memory device. For example, the table management procedure may include: in response to updating a first previous table content of a first table among the at least one table being needed, writing a first updated table content of the first table into at least one first updated table page of at least one table block; and writing a first RAID parity of the first updated table content into a first parity page, wherein a first updated table page count of the at least one first updated table page protected by the first parity page is determined in real time.

Abstract: A method for performing mapping table management of a memory device in a predetermined communications architecture with aid of table analysis and associated apparatus are provided. The method may include: utilizing the memory controller to receive a first command from a host device through a transmission interface circuit of the memory controller; and in response to the first command, loading a local logical-to-physical (L2P) address mapping table from a non-volatile (NV) memory into a volatile memory within the memory controller to be a temporary L2P address mapping table, changing multiple L2P table entries in the temporary L2P address mapping table to be multiple updated L2P table entries in a group-by-group manner, rather than an entry-by-entry manner, and updating the local L2P address mapping table in the NV memory according to the multiple updated L2P table entries of the temporary L2P address mapping table.

Abstract: A method for performing table management of a memory device in predetermined communications architecture with aid of system-region garbage collection (GC) and associated apparatus are provided. The method may include: utilizing the memory controller to perform a system-region GC procedure to manage at least one table regarding internal management of the memory device. The system-region GC procedure may include: reading a set of first table contents from a set of first table pages; and writing the set of first table contents into a set of first system-region-GC-processed table pages of the at least one table block, and writing a first RAID parity of the set of first table contents into a first parity page corresponding to the set of first system-region-GC-processed table pages in the at least one table block, in order to generate a first system-region-GC-processed table RAID protection group, for protecting the set of first system-region-GC-processed table pages.

Abstract: A method for performing table management of a memory device in a predetermined communications architecture with aid of table error correction and associated apparatus are provided. The method may include: utilizing the memory controller to perform a table error correction procedure to manage at least one table regarding internal management of the memory device, for example: when any error of any table page occurs, searching for a first parity identifier backward, and searching for a second parity identifier forward; selecting a next page of a page storing the first parity identifier to be a first page, selecting a page storing the second parity identifier to be a last page, and preparing at least a set of pages among multiple RAID-protection pages, for being decoded; and performing a RAID decoding operation on the set of pages to generate a recovered table page to be a replacement of the any table page.

Abstract: A method for performing access management in a memory device, the associated memory device and the controller thereof, and the associated electronic device are provided. The method may include: receiving a host command and a logical address from a host device; performing at least one checking operation to obtain at least one checking result, for determining whether to load a logical-to-physical (L2P) table from the NV memory to a random access memory (RAM) of the memory device, wherein the L2P table includes address mapping information for accessing the target data, and performing the at least one checking operation to obtain at least one checking result includes checking whether a first L2P-table index pointing toward the L2P table and a second L2P-table index sent from the host device are equivalent to each other; and reading the target data from the NV memory, and sending the target data to the host device.

Abstract: A method for performing data access management of a memory device in a predetermined communications architecture with aid of unbalanced table update and associated apparatus are provided. The method may include: utilizing a memory controller to receive a plurality of host commands from a host device through a transmission interface circuit of the memory controller, receive a set of first data and a set of second data with first and second active blocks according to first and second commands among the host commands, respectively, and update first and second temporary physical-to-logical (P2L) address mapping tables; and in response to a table region of any temporary P2L address mapping table being full, updating a first P2L address mapping table according to the first temporary P2L address mapping table and selectively updating a second P2L address mapping table according to the second temporary P2L address mapping table, for performing subsequent processing.

Abstract: A method for performing data access management of a memory device in a predetermined communications architecture with aid of unbalanced table regions and associated apparatus are provided.

Abstract: A method for performing data access management of a memory device in a predetermined communications architecture with aid of unbalanced table search and associated apparatus are provided. The method may include: utilizing a memory controller to receive a plurality of host commands from a host device through a transmission interface circuit of the memory controller, perform the unbalanced table search to receive a set of first data and a set of second data with first and second active blocks according to first and second commands among the host commands, respectively, and update first and second temporary physical-to-logical (P2L) address mapping tables; and selectively updating a first P2L address mapping table and a second P2L address mapping table according to the first temporary P2L address mapping table and the second temporary P2L address mapping table, respectively, for performing subsequent processing.

Abstract: A method for performing access management in a memory device, the associated memory device and the controller thereof, and the associated electronic device are provided. The method may include: receiving a host command and a logical address from a host device; performing at least one checking operation to obtain at least one checking result, for determining whether to load a logical-to-physical (L2P) table from the NV memory to a random access memory (RAM) of the memory device, wherein the L2P table includes address mapping information for accessing the target data, and performing the at least one checking operation to obtain at least one checking result includes checking whether a first L2P-table index pointing toward the L2P table and a second L2P-table index sent from the host device are equivalent to each other; and reading the target data from the NV memory, and sending the target data to the host device.

Abstract: A method for performing access management in a memory device, the associated memory device and the controller thereof, and the associated electronic device are provided. The method may include: receiving a host command and a logical address from a host device; performing at least one checking operation to obtain at least one checking result, for determining whether to load a logical-to-physical (L2P) table from the NV memory to a random access memory (RAM) of the memory device, wherein the L2P table includes address mapping information for accessing the target data, and performing the at least one checking operation to obtain at least one checking result includes checking whether a first L2P-table index pointing toward the L2P table and a second L2P-table index sent from the host device are equivalent to each other; and reading the target data from the NV memory, and sending the target data to the host device.

Abstract: A method for performing access management in a memory device, the associated memory device and the controller thereof, and the associated electronic device are provided. The method may include: receiving a host command and a logical address from a host device; performing at least one checking operation to obtain at least one checking result, for determining whether to load a logical-to-physical (L2P) table from the NV memory to a random access memory (RAM) of the memory device, wherein the L2P table includes address mapping information for accessing the target data, and performing the at least one checking operation to obtain at least one checking result includes checking whether a first L2P-table index pointing toward the L2P table and a second L2P-table index sent from the host device are equivalent to each other; and reading the target data from the NV memory, and sending the target data to the host device.

Abstract: A method for performing access management in a memory device, the associated memory device and the controller thereof, and the associated electronic device are provided. The method may include: receiving a host command and a logical address from a host device; performing at least one checking operation to obtain at least one checking result, for determining whether to load a logical-to-physical (L2P) table from the NV memory to a random access memory (RAM) of the memory device, wherein the L2P table includes address mapping information for accessing the target data, and performing the at least one checking operation to obtain at least one checking result includes checking whether a first L2P-table index pointing toward the L2P table and a second L2P-table index sent from the host device are equivalent to each other; and reading the target data from the NV memory, and sending the target data to the host device.

Abstract: A method for performing access management in a memory device, the associated memory device and the controller thereof, and the associated electronic device are provided. The method may include: receiving a host command and a logical address from a host device; performing a checking operation to obtain a checking result, for determining whether to load a logical-to-physical (L2P) table from the NV memory to a random access memory (RAM) of the memory device; reading the target data and associated metadata from the NV memory, wherein a latest version of the L2P table is available in the RAM when reading the target data from the NV memory is performed; and checking whether a recorded logical address within the metadata and the logical address received from the host device are equivalent to each other, to control whether to send the target data to the host device.

Abstract: An efficient control technology for non-volatile memory is shown. A non-volatile memory provides a storage space that is divided into blocks. When programming the write data issued by the host to the non-volatile memory, the programming order of the blocks is recorded. Garbage collection is based on the recorded programming order. Sequential data can be collected to the destination block in sequence.

Abstract: An efficient control technology for non-volatile memory is shown. A controller selects the main source block from the non-volatile memory, wherein the main source block has a logical group amount exceeding a threshold amount. The controller selects a target logical group from the main source block, and collects data of the target logical group to a destination block provided by the non-volatile memory to reduce the logical group amount of the main source block.