Patents by Inventor Jie Ke

Jie Ke has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240106394
    Abstract: Disclosed are a power supply circuit, power supply method, audio power amplifier and integrated circuit. The power supply circuit applied to an audio power amplifier may include: a measurement sub-circuit used for measuring a voltage of an audio signal input to the audio power amplifier, which corresponds to output power of the audio power amplifier; a control sub-circuit used for determining a target reference voltage range according to a voltage range of the audio signal within a predetermined time period, which is selected from a plurality of predetermined reference voltage ranges, wherein the voltage range of audio signal within the predetermined time period is included in the target reference voltage range; and a power supply sub-circuit used for generating, based on the target reference voltage range, a power supply voltage that matches the output power of the audio power amplifier, so as to supply power to the audio power amplifier.
    Type: Application
    Filed: September 7, 2021
    Publication date: March 28, 2024
    Inventors: Jie LU, Yi KE, Deheng LIU, Kezheng MA
  • Publication number: 20240096710
    Abstract: An integrated circuit device is provided. The integrated circuit device includes a semiconductor substrate, first and second semiconductor fins over the semiconductor substrate, and first and second epitaxy structures respectively on the first and second semiconductor fins. The first epitaxy structure is merged with the second epitaxy structure, and a bottom surface of the second epitaxy structure is lower than a bottom surface of the first epitaxy structure.
    Type: Application
    Filed: December 1, 2023
    Publication date: March 21, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wen-Hsien TU, Dong-Jie KE
  • Patent number: 11862519
    Abstract: A method for manufacturing an integrated circuit device is provided. The method includes forming first, second, and third semiconductor fins over a semiconductor substrate, in which the second semiconductor fin is between the first and third semiconductor fins; forming first and second fin sidewall spacers respectively on a sidewall of a first portion of the first semiconductor fin and a sidewall of a first portion of the second semiconductor fin, wherein the first and second fin sidewall spacers are between the first and second semiconductor fins; recessing the first portions of the first and second semiconductor fins and a first portion of the third semiconductor fin; and forming first to third epitaxial features respectively on the recessed portions of the first to third semiconductor fins, wherein the second epitaxial feature is spaced apart from the first epitaxial feature and merged with the third epitaxial feature.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: January 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wen-Hsien Tu, Dong-Jie Ke
  • Publication number: 20230068725
    Abstract: A method for manufacturing an integrated circuit device is provided. The method includes forming first, second, and third semiconductor fins over a semiconductor substrate, in which the second semiconductor fin is between the first and third semiconductor fins; forming first and second fin sidewall spacers respectively on a sidewall of a first portion of the first semiconductor fin and a sidewall of a first portion of the second semiconductor fin, wherein the first and second fin sidewall spacers are between the first and second semiconductor fins; recessing the first portions of the first and second semiconductor fins and a first portion of the third semiconductor fin; and forming first to third epitaxial features respectively on the recessed portions of the first to third semiconductor fins, wherein the second epitaxial feature is spaced apart from the first epitaxial feature and merged with the third epitaxial feature.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 2, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wen-Hsien TU, Dong-Jie KE
  • Patent number: 11556332
    Abstract: In an approach, a processor, in response to detecting a new customer resource (CR) file: requests, the computing environment to deploy a plurality of function deployment components in the computing environment, where: the CR file indicates information of a plurality of functions of an application; the plurality of function deployment components request the computing environment to deploy a plurality of function components in the computing environment; and the plurality of function components execute the plurality of functions of the application; determines that each of the plurality of function components has been deployed in the computing environment; and in response to determining that each of the plurality of function components has been deployed in the computing environment, requests the computing environment to delete each of the plurality of deployed function deployment components.
    Type: Grant
    Filed: February 23, 2021
    Date of Patent: January 17, 2023
    Assignee: International Business Machines Corporation
    Inventors: Zhi Li Guan, Yan Fen Guo, Jie Ke Fang, Guo Liang Huang
  • Publication number: 20220269495
    Abstract: In an approach, a processor, in response to detecting a new customer resource (CR) file: requests, the computing environment to deploy a plurality of function deployment components in the computing environment, where: the CR file indicates information of a plurality of functions of an application; the plurality of function deployment components request the computing environment to deploy a plurality of function components in the computing environment; and the plurality of function components execute the plurality of functions of the application; determines that each of the plurality of function components has been deployed in the computing environment; and in response to determining that each of the plurality of function components has been deployed in the computing environment, requests the computing environment to delete each of the plurality of deployed function deployment components.
    Type: Application
    Filed: February 23, 2021
    Publication date: August 25, 2022
    Inventors: ZHI LI GUAN, Yan Fen Guo, Jie Ke Fang, Guo Liang Huang
  • Publication number: 20210110120
    Abstract: A method including in response to a determination result of language inconsistency between two parties of a conversation, starting a translation, which is used for implementing the translation of a first language into a second language; if an original message input by a first user in a first language in the conversation interface is received, obtaining a translation message of the second language corresponding to the original message; displaying the translation message in the conversation interface. Since the input and translation processing of the original message are performed simultaneously, the influence of the translation time on the efficiency of communication between both parties is reduced.
    Type: Application
    Filed: December 18, 2020
    Publication date: April 15, 2021
    Inventors: Yi Zhang, Jie Ke, Jiabao Wan, Guodi Ge, Qian Chen