Patents by Inventor Jie-Ning Yang

Jie-Ning Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8779526
    Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a transistor region and a resistor region; forming a shallow trench isolation (STI) on the substrate of the resistor region; forming a tank in the STI of the resistor region; and forming a resistor in the tank and on the surface of the STI adjacent to two sides of the tank.
    Type: Grant
    Filed: October 28, 2011
    Date of Patent: July 15, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Chun-Wei Hsu, Po-Cheng Huang, Ren-Peng Huang, Jie-Ning Yang, Chia-Lin Hsu, Teng-Chun Tsai, Chih-Hsun Lin, Chang-Hung Kung, Yen-Ming Chen, Yu-Ting Li
  • Patent number: 8753968
    Abstract: A metal gate process includes the following steps. An isolating layer on a substrate is provided, where the isolating layer has a first recess and a second recess. A first metal layer covering the first recess and the second recess is formed. A material is filled in the first recess but exposing a top part of the first recess. The first metal layer in the top part of the first recess and in the second recess is simultaneously removed. The material is removed. A second metal layer and a metal gate layer in the first recess and the second recess are sequentially filled.
    Type: Grant
    Filed: October 24, 2011
    Date of Patent: June 17, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Kuang-Hung Huang, Po-Jui Liao, Yao-Chang Wang, Chi-Sheng Tseng, Jie-Ning Yang
  • Patent number: 8710593
    Abstract: A manufacturing method for a resistor integrated with a transistor having metal gate includes providing a substrate having a transistor, a transitional structure, and a dielectric layer covering the transistor and the transitional structure formed thereon, forming a recess in between two opposite polysilicon end portions in the transitional structure, forming a U-shaped resistance modulating layer and an insulating layer filling the recess, removing a dummy gate of the transistor and the polysilicon end portions of the transitional structure to form a gate trench and two terminal trenches respectively in the transistor and the transitional structure, and forming a metal gate in the gate trench and conductive terminals in the terminal trenches simultaneously.
    Type: Grant
    Filed: April 12, 2012
    Date of Patent: April 29, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Chi-Sheng Tseng, Yao-Chang Wang, Jie-Ning Yang
  • Patent number: 8692334
    Abstract: A method of manufacturing a resistor integrated with a transistor having metal gate includes providing a substrate having a transistor region and a resistor region defined thereon, a transistor is positioned in the transistor region and a resistor is positioned in the resistor region; forming a dielectric layer exposing tops of the transistor and the resistor on the substrate; performing a first etching process to remove portions of the resistor to form two first trenches respectively at two opposite ends of the resistor; forming a patterned protecting layer in the resistor region; performing a second etching process to remove a dummy gate of the transistor to form a second trench in the transistor region; and forming a metal layer filling the first trenches and the second trench.
    Type: Grant
    Filed: July 24, 2013
    Date of Patent: April 8, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Chun-Mao Chiou, Ti-Bin Chen, Tsung-Min Kuo, Shyan-Liang Chou, Yao-Chang Wang, Chi-Sheng Tseng, Jie-Ning Yang, Po-Jui Liao
  • Publication number: 20130307084
    Abstract: A method of manufacturing a resistor integrated with a transistor having metal gate includes providing a substrate having a transistor region and a resistor region defined thereon, a transistor is positioned in the transistor region and a resistor is positioned in the resistor region; forming a dielectric layer exposing tops of the transistor and the resistor on the substrate; performing a first etching process to remove portions of the resistor to form two first trenches respectively at two opposite ends of the resistor; forming a patterned protecting layer in the resistor region; performing a second etching process to remove a dummy gate of the transistor to form a second trench in the transistor region; and forming a metal layer filling the first trenches and the second trench.
    Type: Application
    Filed: July 24, 2013
    Publication date: November 21, 2013
    Applicant: United Microelectronics Corp.
    Inventors: Chun-Mao Chiou, Ti-Bin Chen, Tsung-Min Kuo, Shyan-Liang Chou, Yao-Chang Wang, Chi-Sheng Tseng, Jie-Ning Yang, Po-Jui Liao
  • Publication number: 20130277754
    Abstract: The present invention provides a resistor structure including a substrate, an ILD layer, a transistor and a resistor. The substrate includes a resistor region and an active region. The ILD layer is disposed directly on the substrate. The transistor is disposed in the active region in the ILD layer wherein the transistor includes a metal gate. The resistor is disposed in the resistor region above the ILD layer, wherein the resistor directly contacts the ILD layer.
    Type: Application
    Filed: April 20, 2012
    Publication date: October 24, 2013
    Inventors: Chia-Wen Liang, Yi-Chung Sheng, Shih-Chieh Hsu, Yao-Chang Wang, Chi-Horn Pai, Jie-Ning Yang, Chi-Sheng Tseng
  • Publication number: 20130270650
    Abstract: A manufacturing method for a resistor integrated with a transistor having metal gate includes providing a substrate having a transistor, a transitional structure, and a dielectric layer covering the transistor and the transitional structure formed thereon, forming a recess in between two opposite polysilicon end portions in the transitional structure, forming a U-shaped resistance modulating layer and an insulating layer filling the recess, removing a dummy gate of the transistor and the polysilicon end portions of the transitional structure to form a gate trench and two terminal trenches respectively in the transistor and the transitional structure, and forming a metal gate in the gate trench and conductive terminals in the terminal trenches simultaneously.
    Type: Application
    Filed: April 12, 2012
    Publication date: October 17, 2013
    Inventors: Chi-Sheng Tseng, Yao-Chang Wang, Jie-Ning Yang
  • Publication number: 20130241002
    Abstract: A method of manufacturing a resistor integrated with a transistor having metal gate includes providing a substrate having a transistor region and a resistor region defined thereon, a transistor is positioned in the transistor region and a resistor is positioned in the resistor region; forming a dielectric layer exposing tops of the transistor and the resistor on the substrate; performing a first etching process to remove portions of the resistor to form two first trenches respectively at two opposite ends of the resistor; forming a patterned protecting layer in the resistor region; performing a second etching process to remove a dummy gate of the transistor to form a second trench in the transistor region; and forming a metal layer filling the first trenches and the second trench.
    Type: Application
    Filed: March 14, 2012
    Publication date: September 19, 2013
    Inventors: Chun-Mao Chiou, Ti-Bin Chen, Tsung-Min Kuo, Shyan-Liang Chou, Yao-Chang Wang, Chi-Sheng Tseng, Jie-Ning Yang, Po-Jui Liao
  • Patent number: 8524556
    Abstract: A method of manufacturing a resistor integrated with a transistor having metal gate includes providing a substrate having a transistor region and a resistor region defined thereon, a transistor is positioned in the transistor region and a resistor is positioned in the resistor region; forming a dielectric layer exposing tops of the transistor and the resistor on the substrate; performing a first etching process to remove portions of the resistor to form two first trenches respectively at two opposite ends of the resistor; forming a patterned protecting layer in the resistor region; performing a second etching process to remove a dummy gate of the transistor to form a second trench in the transistor region; and forming a metal layer filling the first trenches and the second trench.
    Type: Grant
    Filed: March 14, 2012
    Date of Patent: September 3, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Chun-Mao Chiou, Ti-Bin Chen, Tsung-Min Kuo, Shyan-Liang Chou, Yao-Chang Wang, Chi-Sheng Tseng, Jie-Ning Yang, Po-Jui Liao
  • Publication number: 20130168816
    Abstract: The present invention provides a structure of a resistor comprising: a substrate having an interfacial layer thereon; a resistor trench formed in the interfacial layer; at least a work function metal layer covering the surface of the resistor trench; at least two metal bulks located at two ends of the resistor trench and adjacent to the work function metal layer; and a filler formed between the two metal bulks inside the resistor trench, wherein the metal bulks are direct in contact with the filler.
    Type: Application
    Filed: January 4, 2012
    Publication date: July 4, 2013
    Inventors: Chih-Kai Kang, Sheng-Yuan Hsueh, Shu-Hsuan Chih, Po-Kuang Hsieh, Chia-Chen Sun, Po-Cheng Huang, Shih-Chieh Hsu, Chi-Horn Pai, Yao-Chang Wang, Jie-Ning Yang, Chi-Sheng Tseng, Po-Jui Liao, Kuang-Hung Huang, Shih-Chang Chang
  • Patent number: 8477006
    Abstract: A manufacturing method for a resistor integrated with a transistor having metal gate includes providing a substrate having a transistor region and a resistor region defined thereon, respectively forming a transistor having a dummy gate in the transistor region and a resistor in the resistor region, removing the dummy gate and portions of the resistor to form a first trench in the transistor and two second trenches in the resistor, forming at least a high-k gate dielectric layer in the first trench and the second trenches, and forming a metal gate in the first trench and metal structures respectively in the second trenches.
    Type: Grant
    Filed: August 30, 2011
    Date of Patent: July 2, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Jie-Ning Yang, Shih-Chieh Hsu, Chun-Hsien Lin, Yao-Chang Wang, Chi-Horn Pai, Chi-Sheng Tseng
  • Publication number: 20130105912
    Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a transistor region and a resistor region; forming a shallow trench isolation (STI) on the substrate of the resistor region; forming a tank in the STI of the resistor region; and forming a resistor in the tank and on the surface of the STI adjacent to two sides of the tank.
    Type: Application
    Filed: October 28, 2011
    Publication date: May 2, 2013
    Inventors: Chun-Wei Hsu, Po-Cheng Huang, Ren-Peng Huang, Jie-Ning Yang, Chia-Lin Hsu, Teng-Chun Tsai, Chih-Hsun Lin, Chang-Hung Kung, Yen-Ming Chen, Yu-Ting Li
  • Publication number: 20130102145
    Abstract: A metal gate process includes the following steps. An isolating layer on a substrate is provided, where the isolating layer has a first recess and a second recess. A first metal layer covering the first recess and the second recess is formed. A material is filled in the first recess but exposing a top part of the first recess. The first metal layer in the top part of the first recess and in the second recess is simultaneously removed. The material is removed. A second metal layer and a metal gate layer in the first recess and the second recess are sequentially filled.
    Type: Application
    Filed: October 24, 2011
    Publication date: April 25, 2013
    Inventors: Kuang-Hung Huang, Po-Jui Liao, Yao-Chang Wang, Chi-Sheng Tseng, Jie-Ning Yang
  • Publication number: 20130099307
    Abstract: A manufacturing method of a semiconductor device having metal gate includes providing a substrate having a first semiconductor device and a second semiconductor device formed thereon, the first semiconductor device having a first gate trench and the second semiconductor device having a second gate trench, forming a first work function metal layer in the first gate trench, forming a second work function metal layer in the first gate trench and the second gate trench, forming a first patterned mask layer exposing portions of the second work function metal layer in the first gate trench and the second gate trench, and performing an etching process to remove the exposed second work function metal layer.
    Type: Application
    Filed: October 21, 2011
    Publication date: April 25, 2013
    Inventors: Chi-Sheng Tseng, Jie-Ning Yang, Kuang-Hung Huang, Yao-Chang Wang, Po-Jui Liao, Shih-Chieh Hsu
  • Publication number: 20130049924
    Abstract: A manufacturing method for a resistor integrated with a transistor having metal gate includes providing a substrate having a transistor region and a resistor region defined thereon, respectively forming a transistor having a dummy gate in the transistor region and a resistor in the resistor region, removing the dummy gate and portions of the resistor to form a first trench in the transistor and two second trenches in the resistor, forming at least a high-k gate dielectric layer in the first trench and the second trenches, and forming a metal gate in the first trench and metal structures respectively in the second trenches.
    Type: Application
    Filed: August 30, 2011
    Publication date: February 28, 2013
    Inventors: Jie-Ning Yang, Shih-Chieh Hsu, Chun-Hsien Lin, Yao-Chang Wang, Chi-Horn Pai, Chi-Sheng Tseng
  • Publication number: 20130049168
    Abstract: A method for forming a resistor integrated with a transistor having metal gate includes providing a substrate having a transistor region and a resistor region defined thereon, forming a transistor having a polysilicon dummy gate in the transistor region and a polysilicon main portion with two doped regions positioned at two opposite ends in the resistor region, performing an etching process to remove the polysilicon dummy gate to form a first trench and remove portions of the doped regions to form two second trenches, and forming a metal gate in the first trench to form a transistor having the metal gate and metal structures respectively in the second trenches to form a resistor.
    Type: Application
    Filed: August 23, 2011
    Publication date: February 28, 2013
    Inventors: Jie-Ning Yang, Shih-Chieh Hsu, Yao-Chang Wang, Chi-Horn Pai, Chi-Sheng Tseng, Kun-Szu Tseng, Ying-Hung Chou, Chiu-Hsien Yeh
  • Publication number: 20120256276
    Abstract: A method of manufacturing a metal gate is provided. The method includes providing a substrate. Then, a gate dielectric layer is formed on the substrate. A multi-layered stack structure having a work function metal layer is formed on the gate dielectric layer. An O2 ambience treatment is performed on at least one layer of the multi-layered stack structure. A conductive layer is formed on the multi-layered stack structure.
    Type: Application
    Filed: April 7, 2011
    Publication date: October 11, 2012
    Inventors: Guang-Yaw Hwang, Chun-Hsien Lin, Hung-Ling Shih, Jiunn-Hsiung Liao, Zhi-Cheng Lee, Shao-Hua Hsu, Yi-Wen Chen, Cheng-Guo Chen, Jung-Tsung Tseng, Chien-Ting Lin, Tong-Jyun Huang, Jie-Ning Yang, Tsung-Lung Tsai, Po-Jui Liao, Chien-Ming Lai, Ying-Tsung Chen, Cheng-Yu Ma, Wen-Han Hung, Che-Hua Hsu
  • Publication number: 20120244669
    Abstract: The present invention provides a method of manufacturing semiconductor device having metal gates. First, a substrate is provided. A first conductive type transistor having a first sacrifice gate and a second conductive type transistor having a second sacrifice gate are disposed on the substrate. The first sacrifice gate is removed to form a first trench. Then, a first metal layer is formed in the first trench. The second sacrifice gate is removed to form a second trench. Next, a second metal layer is formed in the first trench and the second trench. Lastly, a third metal layer is formed on the second metal layer wherein the third metal layer is filled into the first trench and the second trench.
    Type: Application
    Filed: March 22, 2011
    Publication date: September 27, 2012
    Inventors: Po-Jui Liao, Tsung-Lung Tsai, Chien-Ting Lin, Shao-Hua Hsu, Yi-Wei Chen, Hsin-Fu Huang, Tzung-Ying Lee, Min-Chuan Tsai, Chan-Lon Yang, Chun-Yuan Wu, Teng-Chun Tsai, Guang-Yaw Hwang, Chia-Lin Hsu, Jie-Ning Yang, Cheng-Guo Chen, Jung-Tsung Tseng, Zhi-Cheng Lee, Hung-Ling Shih, Po-Cheng Huang, Yi-Wen Chen, Che-Hua Hsu