Abstract: A semiconductor device includes an epitaxial structure, a source electrode, a drain electrode, a gate electrode, and a passivation structure. The source electrode and the drain electrode are disposed on the epitaxial structure and spaced apart from each other. The gate electrode is disposed on the epitaxial structure and between the source electrode and the drain electrode, and has a foot portion and a head portion. The passivation structure is disposed on the epitaxial structure and includes a first passivation layer, a first detective dielectric layer, and a first interlayer dielectric layer. The first detective dielectric layer includes an element that is different from elements contained in the first interlayer dielectric layer. The first passivation layer, the first detective dielectric layer and the first interlayer dielectric layer are disposed adjacent to a side surface of the foot portion of the gate electrode.

Abstract: An HEMT device includes a semiconductor epitaxial layer, a source electrode, a drain electrode, a gate electrode, a field plate structure, a first passivation layer, and a second passivation layer. The gate electrode includes a gate foot and a gate cap. The field plate structure includes a first portion, a second portion, a third portion, an extension portion. The second passivation layer has a first groove. The first groove has a first sidewall and a second sidewall. The first sidewall forms a first inclining angle with an imaginary line parallel to a gate length direction. The second sidewall and the imaginary line form a second inclining angle. Both of the first inclining angle and the second inclining angle are formed outside the first groove, and the first inclining angle is greater than the second inclining angle. A method for manufacturing the HEMT device is also provided.

Abstract: A semiconductor device including an epitaxial structure, a first passivation layer, a second passivation layer and a gate structure is prepared. The first passivation layer is disposed on the epitaxial structure and has a through hole and a recess that spatially communicates with the through hole. The through hole extends from a top surface of the first passivation layer to a bottom surface of the first passivation layer, and the recess is spaced apart from the epitaxial structure. The second passivation layer is disposed in the recess. The gate structure passes through the through hole and is connected to the epitaxial structure. The first passivation layer has a side surface that borders the recess and that is a curved surface.

Abstract: Methods of fabricating a graphene film are disclosed. An example method can include providing a substrate, heating the substrate between about 600° C. and about 1100° C. in a chamber, and introducing a carbon source into the chamber at a temperature between about 600° C. and about 1100° C. for about 10 seconds to about 1 minute. The method can further include cooling the substrate to about room temperature to form the graphene film Methods of fabricating pillared graphene nano structures and graphene based devices are also provided.

Abstract: Methods of fabricating a graphene film are disclosed. An example method can include providing a substrate, heating the substrate between about 600° C. and about 1100° C. in a chamber, and introducing a carbon source into the chamber at a temperature between about 600° C. and about 1100° C. for about 10 seconds to about 1 minute. The method can further include cooling the substrate to about room temperature to form the graphene film Methods of fabricating pillared graphene nano structures and graphene based devices are also provided.