Patents by Inventor Jiecao YU

Jiecao YU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Systems and devices for compressing neural network parameters
    Patent number: 11321604
    Abstract: Subject matter disclosed herein may relate to storage and/or processing of signals and/or states representative of neural network parameters in a computing device, and may relate more particularly to compressing signals and/or states representative of neural network nodes in a computing device.
    Type: Grant
    Filed: June 21, 2017
    Date of Patent: May 3, 2022
    Assignees: ARM Ltd., The Regents of the University of Michigan
    Inventors: Jiecao Yu, Andrew Lukefahr, David Palframan, Ganesh Dasika, Reetuparnda Das, Scott Mahlke
  • Systems and devices for formatting neural network parameters
    Patent number: 11275996
    Abstract: Subject matter disclosed herein may relate to storage of signals and/or states representative of parameters in a computing device, and may relate more particularly to storage of signals and/or states representative of neural network parameters in a computing device.
    Type: Grant
    Filed: June 21, 2017
    Date of Patent: March 15, 2022
    Assignees: ARM Ltd., The Regents of the University of Michigan
    Inventors: Jiecao Yu, Andrew Lukefahr, David Palframan, Ganesh Dasika, Reetuparnda Das, Scott Mahlke
  • Controlling transition between using first and second processing circuitry
    Patent number: 10310858
    Abstract: Apparatus and a corresponding method for controlling a transition between use of first processing circuitry and second processing circuitry to execute program instructions are provided. Transition monitoring storage selects an entry for a load program instruction executed during the transition in dependence on a memory address from which a value is to be loaded and stores a program order timestamp for the load program instruction, unless a valid previously stored program order timestamp in the entry precedes the program order timestamp. Thus the oldest timestamp of an load instruction executed in the transition is held. At either the start or end (or both) of the transition the content of the transition monitoring storage is cleared.
    Type: Grant
    Filed: March 8, 2016
    Date of Patent: June 4, 2019
    Assignee: The Regents of the University of Michigan
    Inventors: Andrew Lukefahr, Shruti Padmanabha, Reetuparna Das, Scott Mahlke, Jiecao Yu
  • SYSTEMS AND DEVICES FOR COMPRESSING NEURAL NETWORK PARAMETERS
    Publication number: 20180373975
    Abstract: Subject matter disclosed herein may relate to storage and/or processing of signals and/or states representative of neural network parameters in a computing device, and may relate more particularly to compressing signals and/or states representative of neural network nodes in a computing device.
    Type: Application
    Filed: June 21, 2017
    Publication date: December 27, 2018
    Inventors: Jiecao Yu, Andrew Lukefahr, David Palframan, Ganesh Dasika, Reetuparnda Das, Scott Mahlke
  • SYSTEMS AND DEVICES FOR FORMATTING NEURAL NETWORK PARAMETERS
    Publication number: 20180373978
    Abstract: Subject matter disclosed herein may relate to storage of signals and/or states representative of parameters in a computing device, and may relate more particularly to storage of signals and/or states representative of neural network parameters in a computing device.
    Type: Application
    Filed: June 21, 2017
    Publication date: December 27, 2018
    Inventors: Jiecao Yu, Andrew Lukefahr, David Palframan, Ganesh Dasika, Reetuparnda Das, Scott Mahlke
  • CONTROLLING TRANSITION BETWEEN USING FIRST AND SECOND PROCESSING CIRCUITRY
    Publication number: 20170262285
    Abstract: Apparatus and a corresponding method for controlling a transition between use of first processing circuitry and second processing circuitry to execute program instructions are provided. Transition monitoring storage selects an entry for a load program instruction executed during the transition in dependence on a memory address from which a value is to be loaded and stores a program order timestamp for the load program instruction, unless a valid previously stored program order timestamp in the entry precedes the program order timestamp. Thus the oldest timestamp of an load instruction executed in the transition is held. At either the start or end (or both) of the transition the content of the transition monitoring storage is cleared.
    Type: Application
    Filed: March 8, 2016
    Publication date: September 14, 2017
    Inventors: Andrew LUKEFAHR, Shruti PADMANABHA, Reetuparna DAS, Scott MAHLKE, Jiecao YU