Abstract: A method may support realistic test circuit generation through random circuit layer blocks. The method may include accessing a set of circuit layer blocks, performing a block-level design rule check (DRC) process on the set of circuit layer blocks, wherein the block-level DRC process applies selected design rules that are a subset of a design rule set for a circuit manufacturing process, and obtaining a set of clean circuit layer blocks by discarding circuit layer blocks in the accessed set of circuit layer blocks that fail the block-level DRC process and keeping circuit layer blocks in the accessed set of circuit layer blocks that pass the block-level DRC process. The method may also include generating a test circuit layer formed through randomly selected circuit blocks from the set of clean circuit layer blocks and utilizing the test circuit layer in support of testing the circuit manufacturing process.