Patents by Inventor Jieda Li

Jieda Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for duty cycle distortion detection through decision feedback equalizer taps
    Patent number: 9484967
    Abstract: An embodiment includes a receiver circuit, a feedback circuit and a control circuit. The receiver circuit is configured to receive each data bit of a plurality of data bits. The feedback circuit is configured to measure a first interference level generated by a first data bit of a first subset of the plurality of data bits on a second data bit of the plurality of data bits to generate one of a first plurality of feedback values. The feedback circuit is also configured to measure a second interference level generated by a third data bit of a second subset of the plurality of data bits on a fourth data bit of the plurality of data bits to generate one of a second plurality of feedback values. The control circuit is configured to determine a duty cycle dependent upon a comparison of the first plurality to the second plurality.
    Type: Grant
    Filed: April 8, 2015
    Date of Patent: November 1, 2016
    Assignee: Oracle International Corporation
    Inventors: Jianghui Su, Yan Yan, Jieda Li
  • METHOD FOR DUTY CYCLE DISTORTION DETECTION THROUGH DECISION FEEDBACK EQUALIZER TAPS
    Publication number: 20160301435
    Abstract: An embodiment includes a receiver circuit, a feedback circuit and a control circuit. The receiver circuit is configured to receive each data bit of a plurality of data bits. The feedback circuit is configured to measure a first interference level generated by a first data bit of a first subset of the plurality of data bits on a second data bit of the plurality of data bits to generate one of a first plurality of feedback values. The feedback circuit is also configured to measure a second interference level generated by a third data bit of a second subset of the plurality of data bits on a fourth data bit of the plurality of data bits to generate one of a second plurality of feedback values. The control circuit is configured to determine a duty cycle dependent upon a comparison of the first plurality to the second plurality.
    Type: Application
    Filed: April 8, 2015
    Publication date: October 13, 2016
    Inventors: Jianghui Su, Yan Yan, Jieda Li