Patents by Inventor Jiefeng Jeff Lin

Jiefeng Jeff Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240105851
    Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first well region and a second well region in a substrate. The method includes forming a third well region in the substrate and between the first well region and the second well region. The method includes forming a deep well region in the substrate and under the first well region and the third well region. The method includes partially removing the substrate to form a first fin, a second fin, and a third fin in the first well region, the second well region, and the third well region respectively. The method includes forming a first epitaxial structure, a second epitaxial structure, and a third epitaxial structure in the first recess, the second recess, and the third recess respectively.
    Type: Application
    Filed: January 12, 2023
    Publication date: March 28, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jiefeng Jeff LIN, Chen-Hua TSAI, Shyh-Horng YANG
  • Patent number: 11210447
    Abstract: The first type of semiconductor device includes a first fin structure extending in a first direction, a first gate, and a first slot contact disposed over the first fin structure. The first gate extends in a second direction and has a first gate dimension measured in the first direction. The first slot contact has a first slot contact dimension measured in the first direction. A second type of semiconductor device includes: a second fin structure extending in a third direction, a second gate, and a second slot contact disposed over the second fin structure. The second gate extends in a fourth direction and has a second gate dimension measured in the third direction. The second slot contact has a second slot contact dimension measured in the third direction. The second slot contact dimension is greater than the second gate dimension and greater than the first slot contact dimension.
    Type: Grant
    Filed: May 16, 2019
    Date of Patent: December 28, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jiefeng Jeff Lin, Chih-Yung Lin, Dian-Sheg Yu, Hsiao-Lan Yang, Jhon Jhy Liaw
  • Patent number: 10879172
    Abstract: Semiconductor structures are provided. A semiconductor structure includes a substrate, a conductive plate of a first metal layer over the substrate, a first resistor material of a resistor layer over the conductive plate, a high-K material formed between the first resistor material and the conductive plate, a first conductive line of a second metal layer over the resistor layer, and a first via formed between the first conductive line and the first resistor material. The conductive plate, the first resistor material and the high-K material form a capacitor between the first and second metal layers. The first distance between the first resistor material and the conductive plate is less than the second distance between the first resistor material and the first conductive line.
    Type: Grant
    Filed: January 3, 2019
    Date of Patent: December 29, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jiefeng Jeff Lin, Hsiao-Lan Yang, Chih-Yung Lin, Chung-Hui Chen, Hao-Chieh Chan
  • Publication number: 20200097632
    Abstract: The first type of semiconductor device includes a first fin structure extending in a first direction, a first gate, and a first slot contact disposed over the first fin structure. The first gate extends in a second direction and has a first gate dimension measured in the first direction. The first slot contact has a first slot contact dimension measured in the first direction. A second type of semiconductor device includes: a second fin structure extending in a third direction, a second gate, and a second slot contact disposed over the second fin structure. The second gate extends in a fourth direction and has a second gate dimension measured in the third direction. The second slot contact has a second slot contact dimension measured in the third direction. The second slot contact dimension is greater than the second gate dimension and greater than the first slot contact dimension.
    Type: Application
    Filed: May 16, 2019
    Publication date: March 26, 2020
    Inventors: Jiefeng Jeff Lin, Chih-Yung Lin, Dian-Sheg Yu, Hsiao-Lan Yang, Jhon Jhy Liaw
  • Publication number: 20200058580
    Abstract: Semiconductor structures are provided. A semiconductor structure includes a substrate, a conductive plate of a first metal layer over the substrate, a first resistor material of a resistor layer over the conductive plate, a high-K material formed between the first resistor material and the conductive plate, a first conductive line of a second metal layer over the resistor layer, and a first via formed between the first conductive line and the first resistor material. The conductive plate, the first resistor material and the high-K material form a capacitor between the first and second metal layers. The first distance between the first resistor material and the conductive plate is less than the second distance between the first resistor material and the first conductive line.
    Type: Application
    Filed: January 3, 2019
    Publication date: February 20, 2020
    Inventors: Jiefeng Jeff LIN, Hsiao-Lan YANG, Chih-Yung LIN, Chung-Hui CHEN, Hao-Chieh CHAN
  • Publication number: 20190195700
    Abstract: Middle-of-line (MOL) metal resistor temperature sensors for localized temperature sensing of active semiconductor areas in integrated circuits (ICs) are disclosed. One or more metal resistors are fabricated in a MOL layer in the IC adjacent to an active semiconductor area to sense ambient temperature in the adjacent active semiconductor area. Voltage of the metal resistor will change as a function of ambient temperature of the metal resistor, which can be sensed to measure the ambient temperature around devices in the active semiconductor layer adjacent to the metal resistor. By fabricating a metal resistor in the MOL layer, the metal resistor can be localized adjacent and close to semiconductor devices to more accurately sense ambient temperature of the semiconductor devices. The same fabrication processes used to create contacts in the MOL layer can be used to fabricate the metal resistor.
    Type: Application
    Filed: February 6, 2019
    Publication date: June 27, 2019
    Inventors: Lixin Ge, Periannan Chidambaram, Bin Yang, Jiefeng Jeff Lin, Giridhar Nallapati, Bo Yu, Jie Deng, Jun Yuan, Stanley Seungchul Song
  • Patent number: 10247617
    Abstract: Middle-of-line (MOL) metal resistor temperature sensors for localized temperature sensing of active semiconductor areas in integrated circuits (ICs) are disclosed. One or more metal resistors are fabricated in a MOL layer in the IC adjacent to an active semiconductor area to sense ambient temperature in the adjacent active semiconductor area. Voltage of the metal resistor will change as a function of ambient temperature of the metal resistor, which can be sensed to measure the ambient temperature around devices in the active semiconductor layer adjacent to the metal resistor. By fabricating a metal resistor in the MOL layer, the metal resistor can be localized adjacent and close to semiconductor devices to more accurately sense ambient temperature of the semiconductor devices. The same fabrication processes used to create contacts in the MOL layer can be used to fabricate the metal resistor.
    Type: Grant
    Filed: August 24, 2016
    Date of Patent: April 2, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Lixin Ge, Periannan Chidambaram, Bin Yang, Jiefeng Jeff Lin, Giridhar Nallapati, Bo Yu, Jie Deng, Jun Yuan, Stanley Seungchul Song
  • Publication number: 20180058943
    Abstract: Middle-of-line (MOL) metal resistor temperature sensors for localized temperature sensing of active semiconductor areas in integrated circuits (ICs) are disclosed. One or more metal resistors are fabricated in a MOL layer in the IC adjacent to an active semiconductor area to sense ambient temperature in the adjacent active semiconductor area. Voltage of the metal resistor will change as a function of ambient temperature of the metal resistor, which can be sensed to measure the ambient temperature around devices in the active semiconductor layer adjacent to the metal resistor. By fabricating a metal resistor in the MOL layer, the metal resistor can be localized adjacent and close to semiconductor devices to more accurately sense ambient temperature of the semiconductor devices. The same fabrication processes used to create contacts in the MOL layer can be used to fabricate the metal resistor.
    Type: Application
    Filed: August 24, 2016
    Publication date: March 1, 2018
    Inventors: Lixin Ge, Chidi Chidambaram, Bin Yang, Jiefeng Jeff Lin, Giridhar Nallapati, Bo Yu, Jie Deng, Jun Yuan, Stanley Seungchul Song