Patents by Inventor Jieqian Yu

Jieqian Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11775723
    Abstract: Disclosed is an improved approach for efficiently implementing a three-dimensional integrated circuit (3D-IC) design with heterogeneous and/or homogeneous dies. A first die design and a second die design in a three-dimensional (3D) electronic design maybe identified, and a wrapper design may be generated for at least a block of circuit component designs in the second die design for concurrent implementation of both the first and the second die designs. Both the first and the second dies of the 3D electronic design are concurrently implemented based at least upon a floorplan that is generated with at least the wrapper design for the 3D electronic design. A first wrapper and a second wrapper may be respectively generated for the first die design and the second die design based at least in part upon a result of the concurrent implementation.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: October 3, 2023
    Assignee: Cadence Design Systems, Inc.
    Inventors: Pinhong Chen, Liqun Deng, Ximing Zhou, Hanqi Yang, Jieqian Yu, Fangfang Li