Abstract: A high voltage generating circuit which provides a constant V.sub.PP output without any threshold voltage drop and which does not suffer from latch-up problems is described. Thus a voltage boosting circuit which provides for a boosted voltage V.sub.PP at an output node, from a supply voltage V.sub.DD, includes a precharge transistor element responsive to a precharge clock signal for transferring the supply voltage V.sub.DD to a boost node for precharging the boost node to the full supply voltage V.sub.DD. The circuit further includes a capacitive element connected between the boost node and a pump node, the capacitive element pumping the boost node in response to a pump voltage signal applied to the pump node; and a switching element connected between the boost node and the output node, for transferring charge from the capacitive element to the output node to provide the boosted voltage V.sub.PP. In particular the precharge transistor element is an PMOS transistor.