Patents by Inventor Jieyun ZHOU

Jieyun ZHOU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10388345
    Abstract: According to one embodiment, a memory device includes a preamplifier configured to execute a first read in which a first current relating to a memory cell is passed through a first path and a second current relating to the first current is passed through a second path, to generate a first voltage, to write first data to the memory cell; and to execute a second read in which a third current relating to the memory cell with the first data written thereto is passed through the first path and a fourth current relating to the third current is passed through the second path, to generate a second voltage; and a sense amplifier configured to determine data stored in the memory cell during execution of the first read based on the first voltage and the second voltage.
    Type: Grant
    Filed: March 12, 2018
    Date of Patent: August 20, 2019
    Assignee: TOSHIBA MEMORY CORORATION
    Inventors: Kosuke Hatsuda, Yoshiaki Osada, Yorinobu Fujino, Jieyun Zhou
  • Publication number: 20190088298
    Abstract: According to one embodiment, a memory device includes a preamplifier configured to execute a first read in which a first current relating to a memory cell is passed through a first path and a second current relating to the first current is passed through a second path, to generate a first voltage, to write first data to the memory cell; and to execute a second read in which a third current relating to the memory cell with the first data written thereto is passed through the first path and a fourth current relating to the third current is passed through the second path, to generate a second voltage; and a sense amplifier configured to determine data stored in the memory cell during execution of the first read based on the first voltage and the second voltage.
    Type: Application
    Filed: March 12, 2018
    Publication date: March 21, 2019
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Kosuke HATSUDA, Yoshiaki OSADA, Yorinobu FUJINO, Jieyun ZHOU
  • Patent number: 9812498
    Abstract: According to one embodiment, a semiconductor device includes a variable resistance circuit having first and second resistance elements connected in series, first and second switch elements connected in parallel with the first resistance element, and third and fourth switch elements connected in parallel with the second resistance element. In a case where the first resistance element is short-circuited, and the second resistance element is not short-circuited, one of the first and second switch elements is turned ON. In a case where the second resistance element is short-circuited, and the first resistance element is not short-circuited, one of the third and fourth switch elements is turned ON. In a case where the first and second resistance elements are short-circuited, the first to fourth switch elements are turned ON.
    Type: Grant
    Filed: July 27, 2016
    Date of Patent: November 7, 2017
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Jieyun Zhou, Shinichiro Shiratake
  • Publication number: 20170236867
    Abstract: According to one embodiment, a semiconductor device includes a variable resistance circuit having first and second resistance elements connected in series, first and second switch elements connected in parallel with the first resistance element, and third and fourth switch elements connected in parallel with the second resistance element. In a case where the first resistance element is short-circuited, and the second resistance element is not short-circuited, one of the first and second switch elements is turned ON. In a case where the second resistance element is short-circuited, and the first resistance element is not short-circuited, one of the third and fourth switch elements is turned ON. In a case where the first and second resistance elements are short-circuited, the first to fourth switch elements are turned ON.
    Type: Application
    Filed: July 27, 2016
    Publication date: August 17, 2017
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Jieyun ZHOU, Shinichiro SHIRATAKE