Patents by Inventor Jigish G. Trivedi

Jigish G. Trivedi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Methods of forming a conductive line
    Patent number: 7081398
    Abstract: A method of forming a local interconnect includes forming an isolation trench within a semiconductor substrate. A first trench isolation material is deposited to within the trench. First isolation material is removed effective to form a line trench into a desired local interconnect. Conductive material is formed therewithin. A second isolation material is deposited over the first isolation material, over the conductive material within the isolation trench and within the line trench. At least some first and second isolation material is removed in at least one common removing step. Integrated circuitry includes a substrate comprising trench isolation material. A local interconnect line is received within a trench formed within the isolation material. The local interconnect includes at least two different conductive materials. One of the conductive materials lines the trench. Another of the conductive materials is received within a conductive trench formed by the one. Other implementations are disclosed.
    Type: Grant
    Filed: October 12, 2001
    Date of Patent: July 25, 2006
    Assignee: Micron Technology, Inc.
    Inventor: Jigish G. Trivedi
  • Integrated circuitry
    Patent number: 6867497
    Abstract: A method of forming a local interconnect includes forming an isolation trench within a semiconductor substrate. A first trench isolation material is deposited to within the trench. First isolation material is removed effective to form a line trench into a desired local interconnect. Conductive material is formed therewithin. A second isolation material is deposited over the first isolation material, over the conductive material within the isolation trench and within the line trench. At least some first and second isolation material is removed in at least one common removing step. Integrated circuitry includes a substrate comprising trench isolation material. A local interconnect line is received within a trench formed within the isolation material. The local interconnect includes at least two different conductive materials. One of the conductive materials lines the trench. Another of the conductive materials is received within a conductive trench formed by the one. Other implementations are disclosed.
    Type: Grant
    Filed: August 15, 2002
    Date of Patent: March 15, 2005
    Assignee: Micron Technology, Inc.
    Inventor: Jigish G. Trivedi
  • Integrated circuitry
    Publication number: 20030071357
    Abstract: A method of forming a local interconnect includes forming an isolation trench within a semiconductor substrate. A first trench isolation material is deposited to within the trench. First isolation material is removed effective to form a line trench into a desired local interconnect. Conductive material is formed therewithin. A second isolation material is deposited over the first isolation material, over the conductive material within the isolation trench and within the line trench. At least some first and second isolation material is removed in at least one common removing step. Integrated circuitry includes a substrate comprising trench isolation material. A local interconnect line is received within a trench formed within the isolation material. The local interconnect includes at least two different conductive materials. One of the conductive materials lines the trench. Another of the conductive materials is received within a conductive trench formed by the one. Other implementations are disclosed.
    Type: Application
    Filed: August 15, 2002
    Publication date: April 17, 2003
    Inventor: Jigish G. Trivedi
  • Methods of forming a conductive line
    Publication number: 20030071356
    Abstract: A method of forming a local interconnect includes forming an isolation trench within a semiconductor substrate. A first trench isolation material is deposited to within the trench. First isolation material is removed effective to form a line trench into a desired local interconnect. Conductive material is formed therewithin. A second isolation material is deposited over the first isolation material, over the conductive material within the isolation trench and within the line trench. At least some first and second isolation material is removed in at least one common removing step. Integrated circuitry includes a substrate comprising trench isolation material. A local interconnect line is received within a trench formed within the isolation material. The local interconnect includes at least two different conductive materials. One of the conductive materials lines the trench. Another of the conductive materials is received within a conductive trench formed by the one. Other implementations are disclosed.
    Type: Application
    Filed: October 12, 2001
    Publication date: April 17, 2003
    Inventor: Jigish G. Trivedi