Patents by Inventor Jih-Chung Twu

Jih-Chung Twu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method to eliminate dishing of copper interconnects by the use of a sacrificial oxide layer
    Patent number: 6372632
    Abstract: A method of forming a planarized metal interconnect comprising the following steps. A semiconductor structure is provided. A low K dielectric layer is formed over the semiconductor structure. A sacrificial layer over is formed over the low K dielectric layer. The sacrificial layer and low K dielectric layer are patterned to form a trench within the sacrificial layer and low K dielectric layer. A barrier layer is formed over the sacrificial layer, lining the trench side walls and bottom. Metal is deposited on the barrier layer to form a metal layer filling the lined trench and blanket filling the sacrificial layer covered low K dielectric layer. The metal layer and the barrier layer are planarized, exposing the upper surface of the sacrificial layer. The sacrificial layer is removed to form a planarized metal interconnect.
    Type: Grant
    Filed: January 24, 2000
    Date of Patent: April 16, 2002
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Chen-Hua Yu, Weng Chang, Jih-Chung Twu, Tsu Shih