Patents by Inventor Ji-hyun In

Ji-hyun In has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12327033
    Abstract: A storage device optimizes block closure in a memory device and maintains quality of service provided to a host device. The storage device receives commands from a host device and writes host data to a block in the memory device in a first state. When the storage device has not received a host write command for a host write idle time period, the storage device transitions to a second state, performs background operations at a first rate, and writes data to the block. When the storage device has not received a host read command or a host write command for a complete idle time period, the storage device transitions to a third state based, performs background operations at a second rate, and writes data to the block. The storage device uses the transitions between the states to maintain quality of service provided to the host device.
    Type: Grant
    Filed: December 8, 2023
    Date of Patent: June 10, 2025
    Inventors: Oleg Kragel, Ji-Hyun In, Aajna Karki, Xiaoying Li
  • Patent number: 12026384
    Abstract: Aspects of a storage device including a memory and a controller are provided. In certain aspects, the controller may determine that data stored on a first block satisfies a threshold data-error condition, the data comprising invalid data and valid data. For example, the first block may have a high ratio of valid data to invalid data that satisfies or exceeds a threshold value. In certain aspects, the controller may determine a close block boundary associated with the first block, wherein the close block boundary is configured to bifurcate the first block into a first portion and a second portion, wherein the first portion comprises the data. For example, the controller may determine a boundary defined by a data length, an indirection mapping unit, a physical program boundary, etc.
    Type: Grant
    Filed: August 26, 2022
    Date of Patent: July 2, 2024
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Ji-Hyun In, Yosief Ataklti, Aajna Karki, Hongmei Xie, Xiaoying Li
  • Publication number: 20240069773
    Abstract: Aspects of a storage device including a memory and a controller are provided. In certain aspects, the controller may determine that data stored on a first block satisfies a threshold data-error condition, the data comprising invalid data and valid data. For example, the first block may have a high ratio of valid data to invalid data that satisfies or exceeds a threshold value. In certain aspects, the controller may determine a close block boundary associated with the first block, wherein the close block boundary is configured to bifurcate the first block into a first portion and a second portion, wherein the first portion comprises the data. For example, the controller may determine a boundary defined by a data length, an indirection mapping unit, a physical program boundary, etc.
    Type: Application
    Filed: August 26, 2022
    Publication date: February 29, 2024
    Inventors: Ji-Hyun IN, Yosief ATAKLTI, Aajna KARKI, Hongmei XIE, Xiaoying LI
  • Patent number: 11640260
    Abstract: A data storage device includes a memory device and a controller coupled to the memory device. The data storage device supports zoned namespace. The controller is configured to maintain a zone timestamp table that includes a corresponding timestamp for each zone and add a timestamp to each garbage collection block of the memory device. The controller is further configured to scan a garbage collection block from a last physical block address (PBA) entry to a first PBA entry, determine a zone timestamp for the scanned PBA entry, and compare the zone timestamp to a timestamp of the garbage collection block. The controller is further configured to create and maintain a zone timestamp table and create and maintain a zone based defragmentation table.
    Type: Grant
    Filed: July 21, 2022
    Date of Patent: May 2, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Hongmei Xie, Aajna Karki, Xiaoying Li, Ji-Hyun In, Dhanunjaya Rao Gorrle
  • Patent number: 11543993
    Abstract: A data storage device includes a memory device and a controller coupled to the memory device. The data storage device supports zoned namespace. The controller is configured to maintain a zone timestamp table that includes a corresponding timestamp for each zone and add a timestamp to each garbage collection block of the memory device. The controller is further configured to scan a garbage collection block from a last physical block address (PBA) entry to a first PBA entry, determine a zone timestamp for the scanned PBA entry, and compare the zone timestamp to a timestamp of the garbage collection block. The controller is further configured to create and maintain a zone timestamp table and create and maintain a zone based defragmentation table.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: January 3, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Hongmei Xie, Aajna Karki, Xiaoying Li, Ji-Hyun In, Dhanunjaya Rao Gorrle
  • Publication number: 20220405001
    Abstract: A data storage device includes a memory device and a controller coupled to the memory device. The data storage device supports zoned namespace. The controller is configured to maintain a zone timestamp table that includes a corresponding timestamp for each zone and add a timestamp to each garbage collection block of the memory device. The controller is further configured to scan a garbage collection block from a last physical block address (PBA) entry to a first PBA entry, determine a zone timestamp for the scanned PBA entry, and compare the zone timestamp to a timestamp of the garbage collection block. The controller is further configured to create and maintain a zone timestamp table and create and maintain a zone based defragmentation table.
    Type: Application
    Filed: July 21, 2022
    Publication date: December 22, 2022
    Applicant: Western Digital Technologies, Inc.
    Inventors: Hongmei XIE, Aajna KARKI, Xiaoying LI, Ji-Hyun IN, Dhanunjaya Rao GORRLE
  • Publication number: 20220404996
    Abstract: A data storage device includes a memory device and a controller coupled to the memory device. The data storage device supports zoned namespace. The controller is configured to maintain a zone timestamp table that includes a corresponding timestamp for each zone and add a timestamp to each garbage collection block of the memory device. The controller is further configured to scan a garbage collection block from a last physical block address (PBA) entry to a first PBA entry, determine a zone timestamp for the scanned PBA entry, and compare the zone timestamp to a timestamp of the garbage collection block. The controller is further configured to create and maintain a zone timestamp table and create and maintain a zone based defragmentation table.
    Type: Application
    Filed: June 17, 2021
    Publication date: December 22, 2022
    Inventors: Hongmei XIE, Aajna KARKI, Xiaoying LI, Ji-Hyun IN, Dhanunjaya Rao GORRLE
  • Patent number: 8724389
    Abstract: Non-volatile solid state mass storage device and methods for improving write performance thereof. The storage device includes a NAND flash controller, an array of NAND flash memory integrated circuits, and means for determining a lowest unused page number of each write target block in a group of the NAND flash memory integrated circuits that are simultaneously accessible at any given time by a write command. The storage device has further means for programming a dummy write to at least a first write target block in a first NAND flash memory integrated circuit within the group of NAND flash memory integrated circuits if the lowest unused page number within the first write target block is lower than the lowest unused page number of a second write target block in a second NAND flash memory integrated circuit in the group of NAND flash memory integrated circuits.
    Type: Grant
    Filed: July 26, 2012
    Date of Patent: May 13, 2014
    Assignee: OCZ Storage Solutions, Inc.
    Inventor: Ji-Hyun In
  • Publication number: 20140029341
    Abstract: Non-volatile solid state mass storage device and methods for improving write performance thereof. The storage device includes a NAND flash controller, an array of NAND flash memory integrated circuits, and means for determining a lowest unused page number of each write target block in a group of the NAND flash memory integrated circuits that are simultaneously accessible at any given time by a write command. The storage device has further means for programming a dummy write to at least a first write target block in a first NAND flash memory integrated circuit within the group of NAND flash memory integrated circuits if the lowest unused page number within the first write target block is lower than the lowest unused page number of a second write target block in a second NAND flash memory integrated circuit in the group of NAND flash memory integrated circuits.
    Type: Application
    Filed: July 26, 2012
    Publication date: January 30, 2014
    Applicant: OCZ TECHNOLOGY GROUP, INC.
    Inventor: Ji-hyun In
  • Patent number: 8543791
    Abstract: An apparatus for reducing a page fault rate in a virtual memory system includes a page table stored in a main storage unit which stores a reference address so as to read page information from the main storage unit; a buffer unit which stores a portion of the page table; and a processor which reads data from the main storage unit or which stores data in the main storage unit. When changing information for referring to a first page that exists in the page table, the processor performs a task invalidating information related to the first page in the buffer unit. A method of reducing the page fault rate includes resetting reference information stored in the page table; detecting whether the reference information exists in a buffer unit; and invalidating the reference information when the reference information exists in the buffer unit.
    Type: Grant
    Filed: October 25, 2006
    Date of Patent: September 24, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Il-hoon Shin, Ji-hyun In
  • Patent number: 7971022
    Abstract: An apparatus for processing data of a non-volatile memory includes a non-volatile memory having a plurality of blocks, an operation processing unit which, when a write operation is requested from a user, writes data in the plurality of blocks, and a block managing unit which collectively converts the plurality of blocks, where the data is written, to a plurality of data blocks and manages statuses of the plurality of blocks to correspond to an operation process performed by the operation processing unit.
    Type: Grant
    Filed: November 30, 2007
    Date of Patent: June 28, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyo-Jun Kim, Nam-Yoon Woo, Ji-Hyun In
  • Patent number: 7953953
    Abstract: A method and apparatus for reducing a page replacement time in a system using a demand paging technique are provided. The apparatus includes a memory management unit which transmits a signal indicating that a page fault occurs, a device driver which reads a page having the page fault from a nonvolatile memory, and a page fault handler that searches and secures a space for storing the page having the page fault in a memory. The searching and securing of the space in the memory is performed within a limited time calculated beforehand and a part of data to be loaded to the memory of the system is stored in the nonvolatile memory.
    Type: Grant
    Filed: December 18, 2006
    Date of Patent: May 31, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ji-hyun In, Il-hoon Shin, Hyo-jun Kim
  • Patent number: 7711918
    Abstract: Provided is an apparatus and method for operating a flash memory according to a priority order, in which a fast response is insured. The apparatus includes a time calculation unit which calculates an operation execution time required to perform a first operation, a remaining time calculation unit which calculates a remaining time until completion of the first operation based on the calculated operation execution time if a second operation having a higher priority than that of the first operation is requested during performing of the first operation, and an operation processing unit which compares the calculated remaining time with an operation suspension time requested to suspend the first operation and determines whether to suspend the first operation in accordance with a result of the comparison.
    Type: Grant
    Filed: January 26, 2007
    Date of Patent: May 4, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Min-young Kim, Song-ho Yoon, Ji-hyun In
  • Patent number: 7702844
    Abstract: A method for minimizing the degradation of performance upon accessing a flash memory using a logical-physical mapping scheme, and a method for efficiently storing and managing information on logical-physical mapping in a flash memory. A method for writing data in a flash memory includes determining whether a sector is empty in a physical page having a most recently written logical page number of data to be written, the offset of the sector matching that of the data to be written; if the sector is empty, writing the data in the sector to the physical page; and if the sector is not empty, selecting an empty physical page to write the data to a sector in the selected empty physical page of which the offset matches that of the data to be written and writing a logical page number for the data to the selected empty physical page.
    Type: Grant
    Filed: December 22, 2004
    Date of Patent: April 20, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Tae-sun Chung, Ji-hyun In, Myung-jin Jung
  • Patent number: 7617381
    Abstract: A demand paging apparatus and a method for an embedded system are provided. The demand paging apparatus includes a nonvolatile storage device, a physical memory, a demand paging window, and a demand paging manager. The nonvolatile storage device stores code and data which are handled by demand paging. The physical memory processes information about a requested page that is read from the nonvolatile storage device. The demand paging window generates a fault for the page and, thus, causes demand paging to occur. The demand paging window is part of an address space to which an application program stored in the nonvolatile storage device refers. The demand paging manager processes the page fault generated in the demand paging window.
    Type: Grant
    Filed: November 22, 2006
    Date of Patent: November 10, 2009
    Inventors: Hyo-jun Kim, Ji-hyun In, Dong-hoon Ham
  • Patent number: 7594062
    Abstract: A method for flash memory management where, if changing of data of a data block recorded in a data area is requested, recording the data block having changed data in an alternative area and recording mapping information representing an address of the data block recorded in the alternative area in a mapping area. If changing of data of the data block recorded in the alternative area is requested, recording a data block having changed data in the data area and deleting the mapping information representing the address recorded in the alternative area from the mapping area. If the mapping information on the data block exists in the mapping area, data is read from the data block in the alternative area, and if the mapping information on the data block does not exist in the mapping area, data is read from the data block at the original address in the data area.
    Type: Grant
    Filed: July 25, 2003
    Date of Patent: September 22, 2009
    Assignees: Samsung Electronics., Ltd., Zeen Information Technologies, Inc.
    Inventors: Ji-hyun In, Dong-hee Lee, Bum-soo Kim, Sung-kwan Kim, Song-ho Yoon
  • Patent number: RE44052
    Abstract: A flash memory management method is provided. According to the method, when a request to write the predetermined data to a page to which data has been written is made, the predetermined data is written to a log block corresponding to a data block containing the page. When a request to write the predetermined data to the page again is received, the predetermined data is written to an empty free page in the log block. Even if the same page is requested to be continuously written to, the management method allows this to be processed in one log block, thereby improving the effectiveness in the use of flash memory resources.
    Type: Grant
    Filed: August 30, 2007
    Date of Patent: March 5, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Bum-Soo Kim, Gui-Yong Lee, Jong-Min Kim, Ji-hyun In, Jesung Kim, Sam-hyuk Noh, Sang-Iyul Min, Dong-hee Lee, Jae-yong Jeong, Yoo-kun Cho, Jong-moo Choi
  • Patent number: RE45222
    Abstract: A flash memory management method is provided. According to the method, when a request to write the predetermined data to a page to which data has been written is made, the predetermined data is written to a log block corresponding to a data block containing the page. When a request to write the predetermined data to the page again is received, the predetermined data is written to an empty free page in the log block. Even if the same page is requested to be continuously written to, the management method allows this to be processed in one log block, thereby improving the effectiveness in the use of flash memory resources.
    Type: Grant
    Filed: June 2, 2011
    Date of Patent: October 28, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Bum-soo Kim, Gui-young Lee, Jong-Min Kim, Ji-hyun In, Je-sung Kim, Sam-hyuk Noh, Sang-Iyul Min, Dong-hee Lee, Jae-yong Jeong, Yoo-kun Cho, Jong-moo Choi
  • Patent number: RE45577
    Abstract: A flash memory management method is provided. According to the method, when a request to write the predetermined data to a page to which data has been written is made, the predetermined data is written to a log block corresponding to a data block containing the page. When a request to write the predetermined data to the page again is received, the predetermined data is written to an empty free page in the log block. Even if the same page is requested to be continuously written to, the management method allows this to be processed in one log block, thereby improving the effectiveness in the use of flash memory resources.
    Type: Grant
    Filed: June 2, 2011
    Date of Patent: June 23, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Bum-soo Kim, Gui-Yong Lee, Jong-Min Kim, Ji-hyun In, Je-sung Kim, Sam-hyuk Noh, Sang-lyul Min, Dong-hee Lee, Jae-yong Jeong, Yoo-kun Cho, Jong-moo Choi
  • Patent number: RE46404
    Abstract: A flash memory management method is provided. According to the method, when a request to write the predetermined data to a page to which data has been written is made, the predetermined data is written to a log block corresponding to a data block containing the page. When a request to write the predetermined data to the page again is received, the predetermined data is written to an empty free page in the log block. Even if the same page is requested to be continuously written to, the management method allows this to be processed in one log block, thereby improving the effectiveness in the use of flash memory resources.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: May 16, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Bum-Soo Kim, Gui-Young Lee, Jong-Min Kim, Ji-Hyun In, Je-Sung Kim, Sam-Hyuk Noh, Sang-Lyul Min, Dong-Hee Lee, Jae-Yong Jeong, Yoo-Kun Cho, Jong-Moo Choi