Patents by Inventor JiKui Luo

JiKui Luo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11527967
    Abstract: Provided is a rhomboid structured triboelectric nanogenerator based on a built-in U-shaped support. The device includes a diamond-shaped bracket and two U-shaped supports. The U-shaped supports is connected with the diamond-shaped bracket through four connecting rods, and the supporting plates of U-shaped supports are sequentially adhered with metal conductor layer and a dielectric material layer, which forms the power generation unit. When the diamond-shaped bracket is closed, the dielectric material layers on the two supporting plates come into contact to produce friction charge; and then subjected to the reverse force after compression of the spring, the two dielectric material layers are separated, so as to generate an induction electric field by the friction charge and form a potential difference. Compared with an existing vibration energy harvester, the advantages will be small space occupation, a long service life, simple fabrication, and a high energy conversion rate.
    Type: Grant
    Filed: April 29, 2021
    Date of Patent: December 13, 2022
    Assignee: ZHEJIANG UNIVERSITY
    Inventors: He Zhang, Zhicheng Zhang, Huagang Wang, Liwei Quan, Jiwei Zhang, Jikui Luo, Shurong Dong
  • Publication number: 20210249972
    Abstract: Provided is a rhomboid structured triboelectric nanogenerator based on a built-in U-shaped support. The device includes a diamond-shaped bracket and two U-shaped supports. The U-shaped supports is connected with the diamond-shaped bracket through four connecting rods, and the supporting plates of U-shaped supports are sequentially adhered with metal conductor layer and a dielectric material layer, which forms the power generation unit. When the diamond-shaped bracket is closed, the dielectric material layers on the two supporting plates come into contact to produce friction charge; and then subjected to the reverse force after compression of the spring, the two dielectric material layers are separated, so as to generate an induction electric field by the friction charge and form a potential difference. Compared with an existing vibration energy harvester, the advantages will be small space occupation, a long service life, simple fabrication, and a high energy conversion rate.
    Type: Application
    Filed: April 29, 2021
    Publication date: August 12, 2021
    Inventors: He ZHANG, Zhicheng ZHANG, Huagang WANG, Liwei QUAN, Jiwei ZHANG, Jikui LUO, Shurong DONG
  • Patent number: 6495421
    Abstract: A method is described of manufacturing a semiconductor material having a zone (200) with p-conductivity type and n-conductivity type regions with dopant concentrations and dimensions such that, when the n- and p-conductivity type regions are depleted of free charge carriers the space charge per unit area of the regions balances at least to the extent that the resulting electric field is lower than that at which avalanche breakdown would occur in the area. The method starts with a semiconductor body having adjacent a first major surface (10b) a first semiconductor region (2) of one conductivity type. A mask (3, 4, 5) is provided on the first major surface, having at least one mask area masking a part (2a) of the first region. At least a part of the unmasked first region (2) is then removed to provide at least one opening (7) in the first region.
    Type: Grant
    Filed: December 14, 2000
    Date of Patent: December 17, 2002
    Assignee: Koninklijke Philips Electronics N.V.
    Inventor: JiKui Luo
  • Publication number: 20010006831
    Abstract: A method is described of manufacturing a semiconductor material having a zone (200) with p-conductivity type and n-conductivity type regions with dopant concentrations and dimensions such that, when the n- and p-conductivity type regions are depleted of free charge carriers the space charge per unit area of the regions balances at least to the extent that the resulting electric field is lower than that at which avalanche breakdown would occur in the area. The method starts with a semiconductor body having adjacent a first major surface (10b) a first semiconductor region (2) of one conductivity type. A mask (3, 4, 5) is provided on the first major surface, having at least one mask area masking a part (2a) of the first region. At least a part of the unmasked first region (2) is then removed to provide at least one opening (7) in the first region.
    Type: Application
    Filed: December 14, 2000
    Publication date: July 5, 2001
    Applicant: PHILIPS CORPORATION
    Inventor: Jikui Luo
  • Patent number: 6251730
    Abstract: In the manufacture of a semiconductor power device such as a trench-gate power MOSFET, a source region (13) is formed using a sidewall extension (30) of an upstanding insulated-gate structure (11,21,22). The sidewall extension (30) forms a step with an adjacent surface area (10a′) of a body region (15) of a first conductivity type and comprises doped semiconductor material (13a) of opposite, second conductivity type which is separated from the gate (11) by insulating material (22). The body region (15) provides a channel-accommodating portion (15a) adjacent to the gate structure (11,21,22) and also comprises a localised high-doped portion (15b) which extends to a greater depth in the semiconductor body (10) than the shallow p-n junction between the source region (13) and the channel-accommodating portion (15a), and preferably deeper even than the bottom of the trench (20) of a trench-gate device.
    Type: Grant
    Filed: July 7, 1999
    Date of Patent: June 26, 2001
    Assignee: U.S. Philips Corporation
    Inventor: JiKui Luo
  • Patent number: 6228698
    Abstract: The manufacture of a semiconductor device, for example a MOSFET of the trench-gate type or an IGBT, includes the steps of: forming at a surface (10a) of a semiconductor body (10) a first mask (53) having a window (53a), forming a localized region (15b) to improve the blocking/breakdown characteristics by introducing dopant (62) into a first area of the body via the window (53a), and thermally diffusing the localized region (15b) to a greater depth than the channel-accommodating region (15a) before providing a source region (13). A second mask (51) of complementary window pattern to the first mask (53) is formed by providing a differently-etchable material (51′) in the first window (53a) and then etch-removing the first mask (53) while leaving the second mask (51) at the first area where the localized region (15b) is present.
    Type: Grant
    Filed: April 15, 1999
    Date of Patent: May 8, 2001
    Assignee: U.S. Philips Corporation
    Inventor: JiKui Luo
  • Patent number: 6087224
    Abstract: The manufacture of a trench-gate semiconductor device, for example a MOSFET or IGBT, includes the steps of forming at a surface (10a) of a semiconductor body (10) a first mask (51) having a first window (51a), and later forming a second mask (52) having a smaller window (52a) by providing sidewall extensions (52b) on the first mask (51). A source region (13) is formed by dopant (63) introduced via the first window (51a), whereas a trench (20) is etched at the smaller window (52a) to extend through a body region (15) and into an underlying portion of a drain region (14). The gate (11) is provided in the trench (20) adjacent to where the channel (12) of the device is accommodated. After removing the second mask (52), a source electrode (23) is provided to contact the source region (13) and an adjacent region (15) of the body (10) at the surface (10a).
    Type: Grant
    Filed: April 15, 1999
    Date of Patent: July 11, 2000
    Assignee: U.S. Philips Corporation
    Inventor: JiKui Luo