Abstract: The embodiments of the present disclosure relate to the field of display technology, and in particular to a display substrate, a display panel, and a display device. The display substrate includes a first electrode, a first wire, and a second wire; the first electrode is provided with a plurality of slits; the first wire is provided on a side of the first electrode, and a first gap is provided between the first wire and the first electrode, and the first wire being electrically connected to the first electrode; a second wire provided on a side of the first electrode away from the first wire, and a second gap being provided between the second wire and the first electrode; wherein each of the slits is provided with a first end and a second end opposed to each other, and the first end is close to the first wire, and the second end is close to the second wire, and a light-transmitting part of the first end is larger than a light-transmitting part of the second end.

Abstract: The present disclosure provides a display panel, a manufacturing method thereof, and a display device. The display panel includes: a first substrate and a second substrate arranged opposite to each other, and a first spacer located between the first substrate and the second substrate, both ends of the first spacer are in contact with the first substrate and the second substrate respectively; a surface of the first substrate close to the second substrate includes a recess, and an end of the first spacer in contact with the first substrate is embedded in the recess.

Abstract: A display substrate, a display panel and a display apparatus. The display substrate including: a substrate having a display area; a plurality of sub-pixels arranged in an array and located in the display area of the substrate; and a plurality of data lines arranged in the display area of the substrate; the plurality of data lines extend in a column direction of the sub-pixels, and a column of sub-pixels are electrically connected with at least one of the plurality of data lines; and for at least one of the plurality of data lines, a side of an orthographic projection of the at least one of the plurality of data lines on the substrate facing orthographic projections of sub-pixels electrically connected with the at least one of the plurality of data lines has a plurality of first concave-convex structures.

Abstract: A display panel has a plurality of sub-pixel regions arranged in an array of a plurality of rows and a plurality of columns, and a light-shielding region that separates the sub-pixel regions and surrounds all the sub-pixel regions as a whole. The display panel includes: a first substrate; a light-shielding pattern layer located on the first substrate, the light-shielding pattern layer being located in the light-shielding region and covering part of the light-shielding region; a second substrate disposed opposite to the first substrate; and a light-shielding structure layer located on the second substrate, the light-shielding structure layer covering at least a region of the light-shielding region that is not covered by the light-shielding pattern layer.

Abstract: A display panel having an active area includes: an array substrate and an opposite substrate disposed opposite to the array substrate. The array substrate includes a first substrate and a conductive structure disposed on the first substrate. The conductive structure is located on a side of the active area. On a side of the conductive structure away from the active area, a side surface of the conductive structure is substantially flush with a side surface of the first substrate. On the side where the conductive structure is located, an edge of an orthographic projection of the opposite substrate on a plane where the array substrate is located is located outside an edge of the array substrate.

Abstract: A display panel and a display device are disclosed. The display panel includes a plurality of sub-pixels arranged in an array; gate line light shielding parts extending in a row direction are arranged on horizontal non-display areas between every two adjacent rows of sub-pixels; vertical non-display areas are arranged between every two sub-pixels adjacent in a row direction; at least one of the vertical non-display areas is provided with a vertical light shielding part, and the vertical light shielding part is configured to prevent two sub-pixels on two sides, in the row direction, of the vertical light shielding part from light leakage at a junction; and a gap is formed between the vertical light shielding part and each of two gate line light shielding parts adjacent to the vertical light shielding part.

Abstract: A display panel and a display device are disclosed. The display panel includes a plurality of sub-pixels arranged in an array; gate line light shielding parts extending in a row direction are arranged on horizontal non-display areas between every two adjacent rows of sub-pixels; vertical non-display areas are arranged between every two sub-pixels adjacent in a row direction; at least one of the vertical non-display areas is provided with a vertical light shielding part, and the vertical light shielding part is configured to prevent two sub-pixels on two sides, in the row direction, of the vertical light shielding part from light leakage at a junction; and a gap is formed between the vertical light shielding part and each of two gate line light shielding parts adjacent to the vertical light shielding part.

Abstract: The present disclosure provides a display panel, a manufacturing method thereof, and a display device. The display panel includes: a first substrate and a second substrate arranged opposite to each other, and a first spacer located between the first substrate and the second substrate, both ends of the first spacer are in contact with the first substrate and the second substrate respectively; a surface of the first substrate close to the second substrate includes a recess, and an end of the first spacer in contact with the first substrate is embedded in the recess.

Abstract: The embodiments of the present disclosure relate to the field of display technology, and in particular to a display substrate, a display panel, and a display device. The display substrate includes a first electrode, a first wire, and a second wire; the first electrode is provided with a plurality of slits; the first wire is provided on a side of the first electrode, and a first gap is provided between the first wire and the first electrode, and the first wire being electrically connected to the first electrode; a second wire provided on a side of the first electrode away from the first wire, and a second gap being provided between the second wire and the first electrode; wherein each of the slits is provided with a first end and a second end opposed to each other, and the first end is close to the first wire, and the second end is close to the second wire, and a light-transmitting part of the first end is larger than a light-transmitting part of the second end.

Abstract: A thin film transistor, a manufacturing method thereof, an array substrate and a display panel are provided. The thin film transistor includes: a base substrate; and a gate electrode, a gate insulating layer, an active layer and a source/drain electrode layer which are on the base substrate. The source/drain electrode layer includes a source electrode and a drain electrode. The thin film transistor further includes a light blocking layer surrounding the active layer.

Abstract: The present disclosure provides a display driving circuit and a driving method thereof, a display panel, and a display device. The display driving circuit comprises: a gate auxiliary circuit configured to selectively output one of a data signal from a source driver and a common voltage signal in response to a first control signal; and a gate auxiliary circuit configured to selectively output one of a scan signal from a gate driver and an active level signal in response to a second control signal, the active level signal being a signal enabling a corresponding switch transistor to be turned on.

Abstract: A common voltage compensation circuit unit including a trigger signal terminal, a common voltage output terminal, a design common voltage signal terminal, a power signal terminal, a compensation common voltage signal terminal, a reset signal terminal, a clock signal terminal, a trigger signal input sub-circuit, a first output sub-circuit, a control sub-circuit, a second output sub-circuit, and a reset sub-circuit. The present disclosure further provides a display panel, a display device, and a common voltage compensation method for a display panel.

Abstract: A common voltage compensation circuit unit including a trigger signal terminal, a common voltage output terminal, a design common voltage signal terminal, a power signal terminal, a compensation common voltage signal terminal, a reset signal terminal, a clock signal terminal, a trigger signal input sub-circuit, a first output sub-circuit, a control sub-circuit, a second output sub-circuit, and a reset sub-circuit. The present disclosure further provides a display panel, a display device, and a common voltage compensation method for a display panel.

Abstract: The embodiments of the present disclosure provide an array substrate, a driving method of an array substrate, a manufacturing method of an array substrate, and a display apparatus. The array substrate comprises a plurality of pixel units, each of which comprises a thin film transistor and a pixel electrode, wherein the thin film transistor comprises a gate line, a source connected to the pixel electrode, and a drain, wherein the gate line has a first overlapped region with the source in an orthogonal projection direction perpendicular to the array substrate, and each pixel unit further comprises an additional signal line provided to have a second overlapped region with the source in the orthogonal projection direction.

Abstract: Provided are a scan driving circuit and driving method thereof, array substrate and a display device. The scan driving circuit includes output ends at m stages, input circuits at m stages, and q shift register circuits. A first end of the input circuit at the i-th stage is connected to the output end at the (i?1)-th stage, and i is any integer greater than 1 and less than m+1. Any shift register circuits is respectively connected to k output ends, and second ends of k input circuits, and the k input circuits have a same combination of stage numbers as k output ends, all stage numbers in same combination of stage numbers have the same parity, and k is greater than 1 and less than m. The shift register circuit is configured to output a scanning signal to one output ends, and outputting the scanning signal to which output ends is indicated by an external control signal.

Abstract: A display substrate, a display device and a method for driving the same are provided. The display substrate includes a plurality of sub-regions. At least one subpixel unit, a common electrode voltage input line, a common electrode voltage control line and at least one control TFT are arranged at each sub-region. At each sub-region, a gate electrode of the control TFT is coupled to the common electrode voltage control line, a source electrode of the control TFT is coupled to the common electrode voltage input line, and a drain electrode of the control TFT is coupled to a common electrode of the subpixel unit.

Abstract: An array substrate, a display panel, a display device and a method for designing the display panel are provided. The array substrate includes a plurality of pixel units, wherein each of the pixel units includes a plurality of sub-pixels, each of the sub-pixels includes a pixel electrode, and the pixel electrode includes a plurality of strip-shaped sub-pixel electrodes arranged in a comb-teeth form, and the sub-pixels of one of the pixel units include at least two sub-pixels. A width of the strip-shaped sub-pixel electrode of any one of the at least two sub-pixels is different from a width of the strip-shaped sub-pixel electrode of any other one of the at least two sub-pixels, and/or an interval between the strip-shaped sub-pixel electrodes of any one of the at least two sub-pixels is different from an interval between the strip-shaped sub-pixel electrodes of any other one of the at least two sub-pixels.

Abstract: Provided are a scan driving circuit and driving method thereof, array substrate and a display device. The scan driving circuit includes output ends at m stages, input circuits at m stages, and q shift register circuits. A first end of the input circuit at the i-th stage is connected to the output end at the (i?1)-th stage, and i is any integer greater than 1 and less than m+1. Any shift register circuits is respectively connected to k output ends, and second ends of k input circuits, and the k input circuits have a same combination of stage numbers as k output ends, all stage numbers in same combination of stage numbers have the same parity, and k is greater than 1 and less than m. The shift register circuit is configured to output a scanning signal to one output ends, and outputting the scanning signal to which output ends is indicated by an external control signal.

Abstract: A display panel and a method for manufacturing the same are disclosed. The display panel includes a first substrate and a second substrate which are cell-assembled; a metal layer, a black matrix and a spacer layer are disposed between the first substrate and the second substrate, and the spacer layer includes a plurality of spacers. Orthographic projections of any two of the spacer, the black matrix and the metal layer on the first substrate are at least partially overlapped with each other; the sum of the thicknesses of the spacer, the metal layer and the black matrix in a direction perpendicular to the first substrate is same at any position corresponding to the spacers.

Abstract: An array substrate, a display panel, a display device and a method for designing the display panel are provided. The array substrate includes a plurality of pixel units, wherein each of the pixel units includes a plurality of sub-pixels, each of the sub-pixels includes a pixel electrode, and the pixel electrode includes a plurality of strip-shaped sub-pixel electrodes arranged in a comb-teeth form, and the sub-pixels of one of the pixel units include at least two sub-pixels. A width of the strip-shaped sub-pixel electrode of any one of the at least two sub-pixels is different from a width of the strip-shaped sub-pixel electrode of any other one of the at least two sub-pixels, and/or an interval between the strip-shaped sub-pixel electrodes of any one of the at least two sub-pixels is different from an interval between the strip-shaped sub-pixel electrodes of any other one of the at least two sub-pixels.